CD54HCT00F3A Search Results

Contextual Info: CD54HC00F3A, CD54HCT00F3A Semiconductor June 1997 Quad 2-Input NAND Gate File Number 3753.1 Functional Diagram This device is fully compliant to the requirements of para­ graph 1.2.1 of MIL-STD-883. v cc The CD54HC00F3A and CD54HCT00F3A logic gates utilize

Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD54HCT00, CD74HC00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116A High Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised November 2002 Features Description

CD74HC00M96

Abstract: CD74HC00MT cd74hc00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M

Abstract: CD74HC00M96E4 74HCT 74LS CD54 CD54HC00 CD54HCT00 CD74HC00 CD74HCT00 HC00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M96

Abstract: CD74HC00M96E4 74HCT 74LS CD54 CD54HC00 CD54HCT00 CD74HC00 CD74HCT00 HC00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M96

Abstract: CD74HC00MT
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M

Abstract: 74HCT 74LS CD54 CD54HC00 CD54HCT00 CD74HC00 CD74HCT00 HC00 HCT00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M

Abstract: CD74HC00M96 CD74HC00MT CD74HC00M96E4 CD74HC00E
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Changes are in accordance with the notice of revision 5962-R058-95. - tvn 95-01-31 Monica L. Poelking B Correct the title to accurately describe the device function. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial

CD74HC00M96E4

Abstract: CD74HC00MT CD74HC00M CD54HC00 CD54HCT00 CD74HC00 CD74HCT00 HC00 HCT00 74LS
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M96

Abstract: HC00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00

Abstract: 74HCT 74LS CD54 CD54HC00 CD54HCT00 CD74HCT00 HC00 HCT00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M96

Abstract: CD74HC00M96E4 74HCT 74LS CD54 CD54HC00 CD54HCT00 CD74HC00 CD74HCT00 HC00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

74HCT

Abstract: 74LS CD54 CD54HC00 CD54HCT00 CD74HC00 CD74HCT00 HC00 HCT00
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116B High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised May 2003 Features Description

cd74HC00

Contextual Info: Texas CD54HC00, CD54HCT00, CD74HC00, CD74HCT00 In s t r u m e n t s Data sheet acquired from Harris Sem iconductor •' SCHS116 High Speed CMOS Logic Quad 2-Input NAND Gate January 1998 Features Description • Buffered Inputs The Harris CD54HC00, CD54HCT00, CD74HC00 and

CD74HC00M

Abstract: CD74HC00MT CD74HC00M96E4
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

cd74HC00

Abstract: CD74HC00M CD54HCT00W
Contextual Info: ? *3 2 £ CD54HC00, CD54HCT00, CD74HC00, CD74HCT00 High Speed CMOS Logic Quad 2-Input NAND Gate January 1998 Features Description • Buffered Inputs The Harris CD54HC00, CD54HCT00, CD74HC00 and CD74HCT00 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL

JD 1803

Abstract: jd 1803 IC jd 1803 data sheet SNV55LVDS31W SNV55LVDS32W jd 1803 data SMV320C6701GLPW14 54LS74A bistable multivibrator using ic 555 SNV54LVTH162245WD
Contextual Info: Mil Sel Guide 04-home-new.qxd R 8/11/2004 2:21 PM E A L W Page 1 O R L D S I G N A L P TM R O C E S S I N G Military Semiconductors Selection Guide 2004-2005 Mil Sel Guide 04-home-new.qxd 8/11/2004 2:21 PM Page 2 Table of Contents and Introduction Enhanced Plastic

CD74HC00

Contextual Info: CD54HC00, CD54HCT00, CD74HC00, CD74HCT00 IHARRIS s e m i c o n d u c t o r High Speed CMOS Logic Quad 2-Input NAND Gate January 1998 Features • Description Buffered Inputs The Harris CD54HC00, CD54HCT00, CD74HC00 and CD74HCT00 logic gates utilize silicon gate CMOS

cd74HC00

Contextual Info: CD54HC00, CD54HCT00, CD74HC00, CD74HCT00 S E M I C O N D U C T O R High Speed CMOS Logic Quad 2-Input NAND Gate January 1998 Features Description • Buffered Inputs The Harris CD54HC00, CD54HCT00, CD74HC00 and CD74HCT00 logic gates utilize silicon gate CMOS

Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

CD74HC00M96

Abstract: CD74HC00MT
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description

Contextual Info: CD54HC00, CD54HCT00, CD74HC00, CD74HCT00 H A R R IS s E „, o o KD u c T o R High Speed CMOS Logic Quad 2-Input NAND Gate May 1997 Features Description • Buffered Inputs The Harris CD54HC00, CD54HCT00, CD74HC00 and CD74HCT00 logic gates utilize silicon gate CMOS

CD74HC00M96

Abstract: CD74HC00MT
Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C High-Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised September 2003 Features Description