BUSCTL Search Results

MACH210A

Contextual Info: module busctl title ' PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI 9060/68040 Demo Board Part Number: xxx-xxxx-xxxx Revision 1.0 07-18-95 Copyright PLX Technology, 1995 ' "device declaration

L1144

Abstract: l0728 l0312 L0936 l0832 L1248 l2904 L4516 L7940 L0624
Contextual Info: ˆABEL 5.02 Data I/O Corp. JEDEC file for: MACH220A V1.3 Created on: Tue Oct 24 14:16:42 1995 PLX TECHNOLOGY PROPRIETARY INFORMATION BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995

E442

Abstract: U0301 350B E422 U0401
Contextual Info: PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL state machine to allow both words of a long word to be read. Return READY to the PCI9060 for

L0936

Abstract: l0728 L1239 L0988 L9960 l0312 l0832 L4204 l0416 L9804
Contextual Info: module busctl title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995 ’ "device declaration

STI3400

Abstract: STI4500
Contextual Info: module busctl title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995 ’ "device declaration

la2 d2 timer

Abstract: L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL

MACH210A

Abstract: SR040
Contextual Info: module busctl title ' PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI 9060/68040 Demo Board Part Number: xxx-xxxx-xxxx Revision 1.0 07-18-95 Copyright PLX Technology, 1995 ' "device declaration

BUSCTL

Abstract: transistor fb transistor fb 31
Contextual Info: ABEL 5.02 - Device Utilization Chart Page 1 Tue Oct 24 14:16:38 1995 PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995

KU80486SX

Abstract: 240486 KU80486SXSA33 ku80486 272769 240950 A80486SXSA33 SL ENHANCED I486 D1542 a80486sx
Contextual Info: Embedded Intel486 SX Processor Datasheet Product Features • ■ ■ ■ ■ 32-Bit RISC Technology Core 8-Kbyte Write-Through Cache Four Internal Write Buffers Burst Bus Cycles Dynamic Bus Sizing for 8- and 16-bit Data Bus Devices SL Technology ■ ■

ic laf 0001

Abstract: laf 0001 M3161 laf 0001 power 95a313 DNA 1001 DL laf 001 testing motherboards using multi meter au mac he nrc IEEE-48
Contextual Info: CS8920 A Cirrus Logic Company ISA Plug-and-Play Ethernet Controller Features Description • Single-Chip IEEE 802.3 Ethernet Controller with Direct ISA-Bus Interface • • • • Implements Industry-Standard Plug and Play Full Duplex Operation Auto-Negotiation of Full and Half duplex Modes

CD 2399 GP

Abstract: 80387 DX Users Manual Programmers Reference
Contextual Info: PRByBJOODOÂIfflr in t e i Intel486 DX MICROPROCESSOR 168-Pin Grid Array Package High Performance Design — RISC Integer Core with Frequent Instructions Executing in One Clock — 25 MHz, 33 MHz, and 50 MHz Clock — 80, 106, 160 Mbyte/sec Burst Bus — CHMOS IV and CHMOS V Process

Contextual Info: PRELIMINARY EMBEDDED ULTRA-LOW POWER Intel486 SX PROCESSOR • Ultra-Low Power Version of the Intel486 ■ SX Processor ■ — 32-Bit RISC Technology Core ■ — 8-Kbyte Write-Through Cache ■ — Four Internal Write Buffers — Burst Bus Cycles ■

hall marking code A04

Abstract: INTELDX4 write-through YSS 928
Contextual Info: INTEL486 PROCESSOR FAMILY • lntelDX4TM P ro c e s s o r — Up to 100-MHz Operation -Speed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant I/O Buffers

uPD765

Abstract: DP8473 N82077 NEC765A PC01 PC87413 PC87414 PC87416 PC87417 tag 9320
Contextual Info: November 2001 Rev 1.1 PC87413, PC87414, PC87416, PC87417 LPC ServerI/O for Servers and Workstations General Description The National Semiconductor PC8741x family of LPC ServerI/O devices “PC8741x” comprises highly integrated Advanced I/O products. The PC8741x is targeted for a wide

sk32v

Abstract: Intel486TM PROCESSOR FAMILY a80486dx2
Contextual Info: in te i EMBEDDED lntelDX2 PROCESSOR Integrated Floating-Point Unit SL Technology Speed-Multiplying Technology Data Bus Parity Generation and Checking 32-Bit RISC Technology Core Boundary Scan JTAG 8-Kbyte Write-Through Cache 3.3-Volt Processor, 50 MHz, 25 MHz CLK

FDS 4468

Abstract: HBT 01 - 04G INTEL 486 sx sl pinout 240950 JVC 4580 fds 4418 TOT - 4301 INTEL DX4 241199 Intel DX4TM
Contextual Info: intj, INTEL486 PROCESSOR FAMILY • Write-Back Enhanced lntelDX4™ Processor — Up to 100-MHz Operation — Speed-Multiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Write-Back Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant

manual for Misa

Abstract: ruy 1015
Contextual Info: AMD£I Am486 DX/DX2 Microprocessor Hardware Reference Manual AMD's Marketing Communications Department specifies environmentally sound agricultural irks and recycled papers, making this book highly recyclable. Am486™DX/DX2 Microprocessor Hardware Reference

Contextual Info: = CIRRUS LOGIC FEATURES CS8900A Advanced Product Databook Crystal LAN ISA Ethernet Controller • Single-Chip IEEE 802.3 Ethernet Controller with Direct ISA-Bus Interface ■ Maximum Current Consumption = 55 mA 5V Supply ■ 3 V Operation ■ Industrial Temperature Range

93CS46

Abstract: 0x00000018 E 32.0000 C 10B5 c code for pci master
Contextual Info: PCI9060/68040 AN July 1995 PCI9060/68040 Application Note VERSION 1.0 _ _ _ Features_ • • • • • • • • PCI9060 bridge between Primary PCI Bus and Intel

la1 d22

Abstract: la2 d2 timer rn0805 U0301 L16 eeprom 80960CA LD11 LD12 U0101 PCI9060 68040
Contextual Info: 1 2 3 4 5 SPARE GATES: 1 2 3 4 5 6 7 8 9 10 11 14 23 13 A U0101 CLK I1 I2 I3 I4 I5 I6 I7 I8 I9 I10 I11 I12 OE IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO8 1 2 3 4 5 6 7 8 9 10 11 14 23 13 22 21 20 19 18 17 16 15 6 |LINK |P2.SCH |P3.SCH |P4.SCH |P5.SCH |P6.SCH |P7.SCH |P8.SCH

Y0803

Abstract: U0801B IC LM7805 N1 Y10 pin diagram of IC LM7805 C0801 STI3400 U0101 U0604 plx9060
Contextual Info: Q CL 7 D PR 3 4 14 2 U?A Q 5 CLK 6 {Value} 1 1 2 3 4 5 6 SPARE GATES: 8 ECN HISTORY DESCRIPTION REV 2 -ADD CDREQ DATE APPROVAL 10/24/95 U0101 PU0101 A PU0102 PU0103 12 11 D U0801B 9 Q CLK 8 Q 74ACT74 13 20V8C DIP 22 21 20 19 18 17 16 15 CL O1 IO2 IO3 IO4 IO5

ic laf 0001

Abstract: laf 0001 CRD8900A-1 CS8900A aui isolation transformer CS8900A-IQ laf 0001 power laf 0001 Datasheet laf 0001 power Datasheet 10BASE2
Contextual Info: CS8900A Product Data Sheet FEATURES Single-Chip IEEE 802.3 Ethernet Controller with Direct ISA-Bus Interface Maximum Current Consumption = 55 mA 5V Supply 3 V Operation Industrial Temperature Range Comprehensive Suite of Software Drivers Available Efficient PacketPage Architecture Operates in

L1239

Abstract: l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _

HPC3130

Abstract: M66EN REQ64 add454
Contextual Info: HPC3130 PCI HOT PLUG CONTROLLER SCPS029B - DECEMBER1998 Compliant with PCI Hot-Plug Specification, Revision 1.0 Provides an Easy Scheme to Cascade the HPC3130 for Compact PCI Applications Provides Card Detection Mechanism Independent of PCI Present Signals for