BL723 Search Results

Contextual Info: TEXAS INSTR B 1E LOGIC D • fi^bl723 D06T2flS 2 ■ T I I3 54ACT11377,74ACT11377 OCTAL D-TYPE FLIP-FLOPS WITH CLOCK ENABLE 11 _ D3450, MARCH 1990-REVISED JUNE 1990 54ACT11377. . . JT PACKAGE 74ACT11377. . . DW OR NT PACKAGE

Contextual Info: TE XA S INS TR LOGIC 5SE » • fl^bl723 Q 0 A 4 3 3 2 4 SN54F574, SN74F574 OCTAL D TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS 0 3 0 3 4 , SEPTEMBER 1987-REVISÈD JANUARY 1989 • 8 D-Type Flip-Flops In a Single Package • 3-State Bus-Driving True Outputs

D2B4

Abstract: H1B13
Contextual Info: SN54ABT32543, SN74ABT32543 36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS230B - JUNE 1992 - REVISED JULY 1994 • Members of the Texas Instruments Wldebus+ Family • State-of-the-Art EPIC-llB™ BICMOS Design Significantly Reduces Power Dissipation

ABT244A

Abstract: SN74ABT240A
Contextual Info: SN54ABT240A, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS S C B S 0 9 8 F -J A N U A R Y 1991 - R EVISED MAY 1996 State-of-the-Art EPIC-UB BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17

SN74ALVCH162601

Contextual Info: SN74ALVCH162601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SC ES 026- JULY 1995 • Member of the Texas Instruments Wldebus Family • EPIC™ Enhanced-Performance Implanted CMOS Submicron Process • UBT™ (Universal Bus Transceiver) Combines D-Type Latches and D-Type

SN74ACT7804

Abstract: SN74ACT7806 SN74ACT7814
Contextual Info: SN74ACT7814 64 x 18 FIRST-IN, FIRST-OUT MEMORY SCAS209 - APRIL 1992 D L PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Load Clock and Unload Clock Can Be Asynchronous or Coincident RESET [ 1 64 Words by 18 Bits Low-Power Advanced CMOS Technology

BV 501

Abstract: SN74ALVCH16820
Contextual Info: SN74ALVCH16820 3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS S C E S 0 3 5 - JULY 1995 Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds

QS3384

Abstract: QS3L384 SN74CBT3384A
Contextual Info: SN74CBT3384A 10-BIT BUS SWITCH S C D S 004F- NOVEMBER 1992 - REVISED AUGUST 1996 • Functionally Equivalent to QS3384 and QS3L384 DB, DW, OR PW PACKAGE TOP VIEW • 5-i2 Switch Connection Between Two Ports 10 E [ 1 1B1 [ 2 • TTL-Compatible Input and Output Levels

HCT244

Abstract: SN54HCT244 SN74HCT244 01G50
Contextual Info: SN54HCT244, SN74HCT244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS _ S C L S 1 7 5 A -M A R C H 1 984 - REVISED JAN U A R Y 1996 Inputs Are TTL-Voltage Compatible 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers High-Current Outputs Drive up to 15 LSTTL

SN74LV138

Abstract: SCLS190A
Contextual Info: SN74LV138 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCLS190A - FEBRUARY 1993 - REVISED JULY 1995 EPIC Enhanced-Performance Implanted CMOS 2-n Process Typical V q l p (Output Ground Bounce) < 0.8 V at VCc = 3-3 V, TA = 25°C Typical V o h v (Output V o h Undershoot)

suss Instruments

Abstract: D3501 SN74ALS2238 gba 2674
Contextual Info: SN74ALS2238 32 x 9 x 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY D3501, APRIL 1990 N PACKAGE TOP VIEW Independent Asychronous Inputs and Outputs Bidirectional 30 R lT B DBF BO B1 B2 GND B3 B4 B5 B6 GND VCC 12 29 Vc c A7 A8 LDCKA FULLA UNCKB EMPTYB

SN54LVT16373

Abstract: LVT16373 hl723 SN74LVT16373
Contextual Info: SN54LVT16373, SN74LVT16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS _ State-of-the-Art Advanced BiCMOS Technology ABT Design for 3.3-V Operation and Low-Static Power Dissipation Members of the Texas Instruments Widebus Family

Contextual Info: SN54F521, SN74F521 8-BIT IDENTITY COMPARATORS SDFS091 - MARCH 1987 - REVISED OCTOBER 1993 • Compares Two 8-Bit Words • Package Options Include Plastic Smali-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN54F521 . . . J PACKAGE

SN54ABT8652

Abstract: SN74ABT8652
Contextual Info: SN54ABT8652, SN74ABT8652 « SCAN TEST d e v ic e s WITH OCTAL BUS TRANSCEIVERS AND REGISTERS - _ • Members of the Texas Instruments SCOPE Family of Testability Products • Compatible With the IEEE Standard 1149.1-1990 JTAG Test Access Port and

E8 55A

Abstract: SN54AS250A SN74AS250A TL1723 3J01
Contextual Info: SN74AS250A, SN54AS250A 1-0F-16 DATA GENERATORS/MULTIPLEXERS WITH 3-STATE OUTPUTS D2910, DECEMBER 1983 - REVISED JUNE 1987 * S N 5 4 A S 2 5 0 A . . . J T PACKAGE* S N 7 4 A S 2 & 0 A . . . D W OR N T PACKAGE 4 -Line to 1-Una Multiplexer that Can Select 1 and 16 Data Inputs

SN74ABT3611

Abstract: mdv 434
Contextual Info: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SC B S 127C - JULY 1992 - RE V IS E D A P R IL 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Empty Flag EF and Almost-Empty Flag (AE) Synchronized by CLKB 64 x 36 Clocked FIFO Buffering Data From

Transistor BC 1078

Abstract: TSS400-S1 LCD tlc 771 TSS400CFN-S1 abe 630 K-Line L line BC 557 PNP TRANSISTOR circuits D4071 digital pressure sensor conditional circuit 44-PIN
Contextual Info: TSS400-S1 uPOWER PROGRAMMABLE HIGH-PRECISION SENSOR SIGNAL PROCESSOR SLMS001 -D 407 1, JANUARY 1993 * Onboard Ratiometric Current Source Programmable From 0.15 mA x SV^d/V to 2.4 mA x (SVDD/V) Two Independent Crystal Controlled Timers (32.768 kHz) Internal MOS Oscillator Serves as System

LVT543

Abstract: SN54LVT543 SN74LVT543
Contextual Info: SN54LVT543, SN74LVT543 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS S C B S 1 3 7 C - MAY 1 9 9 2 - REVISED JULY 1994 SN54LVT543. . . JT PACKAGE SN74LVTS43 . . . DB, DW, OR PW PACKAGE TOP VIEW State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V

HC08

Abstract: SN54HC7001 SN74HC7001
Contextual Info: SN54HC7001, SN74HC7001 QUADRUPLE POSITIVE-AND GATES WITH SCHMITT-TRIGGER INPUTS SCLS035A - M ARCH 1984 - R EVISED JANUARY 1996 Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HC08 Package Options Include Plastic

PASB

Abstract: ec ubt 4.8 t LVTH182502A LVTH18502A SN54LVTH182502A SN54LVTH18502A SN74LVTH182502A SN74LVTH18502A
Contextual Info: SN54LVTH18502A, SN54LVTH182502A, SN74LVTH18502A, SN74LVTH182502A 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS S C B S 6 6 8 A -JULY 1 9 9 6 - REVISED DECEMBER 1996 Members of the Texas Instruments SCOPE Family of Testability Products

HAI 7203

Abstract: ACT8847 74ACT8847 SN74 multiplier
Contextual Info: TEXAS INSTR LOGIC SSE D 0^1723 GQÖS7G3 7 SN74ACT8847 64-Bit Floating Point Unit • Meets IEEE Standard for Single- and DoublePrecision Formats • Performs Floating Point and Integer Add, Subtract, Multiply, Divide, Square Root, and Compare • 64-Bit IEEE Divide in 11 Cycles, 64-Bit Square

Contextual Info: SN54ALS374, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167A - APRIL 1982 - REVISED DECEMBER 1994 D-Type Flip-Flops in a Single Package With 3-State Bus-Driving True Outputs Full Parallel Access for Loading

Contextual Info: SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS SDAS061C-APRIL 1982 - REVISED JANUARY * 3-State Buffer-Type Outputs Drive Bus Lines Directly * Bus-Structured Pinout SN54ALS874B . . . JT PACKAGE SN74ALS874B, SN74AS874. . . DW OR NT PACKAGE

Contextual Info: SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SDAS187A-APRIL 1 9 8 2 - REVISED DECEMBER 1994 • Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs