BE4L Search Results
BE4L Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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be5l
Abstract: CA3046 equivalent lg 15.6 pinout CA3046 CA3046M BE4L d143 T transistor
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OCR Scan |
CA3045' CA3046 CA3045, be5l CA3046 equivalent lg 15.6 pinout CA3046 CA3046M BE4L d143 T transistor | |
BE5L
Abstract: CYD18S18V18 CYD09S36V18 CYD18S36V18 SKR 175 FullFlex36
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FullFlex36Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port |
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36-Gb/s 484-ball 256-ball FullFlex72 CYDD36S72V18) CYDD18S72V1t 27mmx27mmx2 36Mx36 36Mx18 FullFlex36 | |
FullFlex36Contextual Info: PRELIMINARY FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port |
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36-Gb/s 484-ball 256-ball FullFlex72 CYDD36S72V18) CYDD18S72V18 XS36V18 CYDXXS18V18 BW256 FullFlex36 | |
FullFlex36Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port |
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36-Gb/s 484-ball 256-ball FullFlex72 CYDD36S72V18) CYDD18S72V1mation 27mmx27mmx2 36Mx36 36Mx18 FullFlex36 | |
FullFlex36Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR |
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CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 | |
Contextual Info: CYD04S72V CYD09S72V CYD18S72V FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM Functional Description Features • True dual-ported memory cells that allow simultaneous access of the same memory location ■ Synchronous pipelined operation ■ Family of 4 Mbit, 9 Mbit, and 18 Mbit devices |
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CYD04S72V CYD09S72V CYD18S72V FLEx72â 64K/128K/256K 18-micron | |
BE5L
Abstract: CYD04S72V CYD09S72V CYD18S72V DQ60L
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CYD04S72V CYD09S72V CYD18S72V FLEx72TM K/128 K/256 18-micron BE5L CYD04S72V CYD09S72V CYD18S72V DQ60L | |
be5lContextual Info: CYD04S72V CYD09S72V CYD18S72AV FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM Features Functional Description • True dual-ported memory cells that allow simultaneous access of the same memory location The FLEx72 family includes 4-Mbit, 9-Mbit and 18-Mbit |
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CYD04S72V CYD09S72V CYD18S72AV FLEx72TM 64K/128K/256K 18-Mbit 18-micron 484-ball FLEx72-E CYD18S72AV be5l | |
FullFlex36Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR |
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CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 | |
FullFlex36
Abstract: CYDXXS36V18 400 OHM RESISTOR DQ67
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CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 400 OHM RESISTOR DQ67 | |
CYD18S18V18
Abstract: FullFlex36 CYD09S36V18 CYD18S36V18 ARRAY VCSEL
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36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) FullFlex36 FullFlex18 CYD18S18V18 CYD09S36V18 CYD18S36V18 ARRAY VCSEL | |
FullFlex36Contextual Info: PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz |
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36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36 | |
TMS 1070 NL
Abstract: BE5L NA820 str 350-430 FullFlex36 CYD04S18V18 CYD36S18V18-133BGI CYD36S36V18-133BGI CYD36S72V18-133BGI tca 780
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36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 36Mx72 TMS 1070 NL BE5L NA820 str 350-430 FullFlex36 CYD04S18V18 CYD36S18V18-133BGI CYD36S36V18-133BGI CYD36S72V18-133BGI tca 780 | |
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DQ12-DQ15
Abstract: CYDXXS36V18 16-SD FullFlex36
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18-Mbit, 36-Mbit CYDXXS36V18 CYDXXS18V18 256-Ball BW256 FullFlex36 484-ball FullFlex18 DQ12-DQ15 16-SD | |
be5l
Abstract: CYD18S72V-133BBI CYD04S72V CYD09S72V CYD18S72V
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CYD04S72V CYD09S72V CYD18S72V FLEx72TM 64K/128K/256K FLEx72 18-Mbit 18-Mbit CYD09S72V CYDxxS72AV be5l CYD18S72V-133BBI CYD04S72V CYD18S72V | |
Contextual Info: HIGH-SPEED 2.5V 256/128K x 72 IDT70T3719/99M SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access |
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256/128K IDT70T3719/99M 166MHz 133MHz) 5T2010 5T9010 5T905, 5T9050 | |
FullFlex36Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR |
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CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 72-bit 484-ball 256-ball FullFlex36 | |
CYD18S72V-133BBI
Abstract: CYD04S72V CYD09S72V CYD18S72V BE6R DQ49L
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CYD04S72V CYD09S72V CYD18S72V FLEx72TM 64K/128K/256K FLEx72 18-Mbit 18-Mbit CYD09S72V CYDxxS72AV CYD18S72V-133BBI CYD04S72V CYD18S72V BE6R DQ49L | |
be5l
Abstract: AN5296 Application of the CA3018 CA3046 CA3045 CA3046 equivalent Harris CA3018 CA3045/3
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OCR Scan |
CA3045, CA3046 CA3045 CA3046 be5l AN5296 Application of the CA3018 CA3046 equivalent Harris CA3018 CA3045/3 | |
BE5L
Abstract: O41L be5r BE6R O48R O71R
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256/128K IDT70T3719/99M 166MHz 133MHz) 5T2010 5T9010 5T905, 5T9050 BE5L O41L be5r BE6R O48R O71R | |
FullFlex36Contextual Info: FullFlex PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with SDR operation on each port — Single Data Rate SDR interface at 250 MHz |
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36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36 | |
FullFlex36
Abstract: TMS 1070 NL
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36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36 TMS 1070 NL | |
be5lContextual Info: CYD04S72V CYD09S72V CYD18S72AV FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM Features Functional Description • True dual-ported memory cells that allow simultaneous access of the same memory location The FLEx72™ family includes 4-Mbit, 9-Mbit and 18-Mbit |
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CYD04S72V CYD09S72V CYD18S72AV FLEx72TM 64K/128K/256K 18-Mbit 18-micron 484-ball CYD18S72AV be5l |