B3S3311 Search Results

Contextual Info: M O SE L VÊTELIC V53C404B HIGH PERFORMANCE, LOW POWER 1 M X 4 BIT FAST PAGE MODE CMOS DYNAMIC RAM 60 70 80 10 M ax. RAS Access Time, 1RAC 60 ns 70 ns 80 ns 100 ns M ax. Column Address Access Tim e, (tCAA) 30 ns 35 ns 40 ns 50 ns HIGH PERFORMANCE V53C404B

Contextual Info: MOSEL VITELIC P R E LIM IN A R Y V53C16256H 2 5 6 K X 16 F A S T P A G E M O D E CM O S D YN A M IC R A M HIGH PERFORMANCE 40 45 50 60 40 ns 45 ns 50 ns 60 ns 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, tPC 23 ns 25 ns 28 ns 35 ns Min. Read/Write Cycle Time, (tRC)

Contextual Info: M O SEL VITELIC V53C818L H IG H PERFO RM AN CE 3.3 VOLT 512 K X 16 EDO PA G E M O D E C M O S DYNAM IC RAM HIGH PERFORMANCE PRELIM INARYf 40 45 50 60 Max. RAS Access Time, Irac 4 0 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tcAA) 20 ns 22 ns

Contextual Info: MOSEL- VITELIC bEE D MOSEL- VITELIC b3533^1 G0DSS15 IbS IMOVI M S 7200/7201A /7202A 256x9,512x9, 1 K x 9 C M O S F IFO Features Descriptions • First-In/First-Out static RAM based dual port memory ■ Three densities in a x9 configuration ■ Low power versions

Contextual Info: M O SEL VETEUC V52C4256 MULTIPORT VIDEO RAM WITH 256K X 4 DRAM AND 512 X 4 SAM HIGH PERFORMANCE V52C4256 60 70 80 10 Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. CAS Access Time, (tCAC) 15 ns 20 ns 25 ns 25 ns Max. Column Address Access Time, (1M )

Contextual Info: MOSEL ViTEUC V52C8258 MULTIPORT VIDEO RAM WITH 256K X 8 DRAM AND 512 X 8 SAM HIGH PERFORMANCE V52C8258 PRELIMINARY 60 70 Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. CAS Access Time, (tcAC) 15 ns 20 ns 25 ns Max. Column Address Access Time, (tM ) 30 ns

Contextual Info: M O S E L V IT E L IC V53C100H ULTRA-HIGH PERFORMANCE LOW POWER 1M X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C100H 45/45L 50/50L 55/55L 60/60L Max. RAS Access Time, tRAC 45 ns 50 ns 55 ns 60 ns Max. Column Address Access Time, (tCAA) 22 ns

Contextual Info: M O S E L ViTEUC V104J8 256K C M O S MEMORY M ODULE Features Description • ■ ■ ■ ■ ■ The V104J8 Memory Module is organized as 2 62,144 x 8 bits in a 30-lead single-in-line module. The 256K x 8 memory module uses two Vitelic 256K x 4 DRAMs. Decoupling capacitors, mounted

Contextual Info: M OSEL VITELIC V43644R04V C TG-10PC 3.3 VOLT 4M x 64 HIGH PERFORMANCE PC100 UNBUFFERED SDRAM MODULE PRELIMINARY Features Description • 168 Pin Unbuffered 4,194,304 x 64 bit Oganization SDRAM Modules ■ Utilizes High Performance 4M x 16 SDRAM in TSOPII-54 Packages

Contextual Info: M O S E L V IT E L IC PRELIM INARY V62C3181024 2 .7 VOL T 1 2 8 K X 8 STA TIC RAM Features • Packages - 32-pin TSOP Standard - 32-pin TSOP (Reverse) - 32-pin 600 mil PDIP - 32-pin 300 mil SOP (450 mil pin-to-pin) - 32-pin 440 mil SOP (525 mil pin-to-pin)

cs 9018 transistor

Abstract: U3031 wn 820
Contextual Info: MOSEL VITELIC MSU3031/U3041 May 1996 120" VOICE SMART General Description The MSU3031/U3041 is a monolithic talking microcomputer that can memorize voice up to 90/120 seconds using MOSEL qualified coding method MPCM . It's an integration of traditional 4-bit microcomputer

YM 3533

Contextual Info: bEE D MOSEL-VITELIC MOSEL-VITELIC • b3533^1 Q0QS3MS 7Ô3 ■ M O V I V400J8/9 4M X 8, 4M X 9 B IT FA ST PAGE MODE CMOS DYNAMIC RAM M EM ORY MODULE HIGH PERFORMANCE, LO W POWER HIGH PERFORMANCE V400J8/9 PRELIMINARY 70/70L 80/80L 10/10L 70 ns 80 ns 100 ns

Contextual Info: M O S E L VÊTELIC V53C8256N HIGH PERFORMANCE, 3.3 VOLT 256K X 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C8256N PRELIMINARY 60/60L 70/70L 80/80L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns

Contextual Info: M O SEL VITELIC PRELIM INARY V62C318256 2 .7 VOL T 3 2 K X 8 STA TIC RAM Features • Packages - 28-pin TSOP Standard - 28-pin TSOP (Reverse) - 28-pin 600 mil PDIP - 28-pin 300 mil SOP (450 mil pin-to-pin) ■ High-speed: 35, 45, 55, 70 ns ■ Ultra low DC operating current of 3mA (max.)

Contextual Info: M O S E L V IT E U C P R E LIM IN A R Y V1780J32 2 M x 32 E D O M E M O R Y M O D U LE Features Description m 2,097,152 x 32 bit organization The V1708J32 memory module is organized as 2,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 2M x 32 memory module uses 4 MoselVitelic 1M x 16 DRAMs. The x32 modules are ideal

v52c4258

Contextual Info: M O S E L V IT E U C V52C4258 MULTIPORT VIDEO RAM WITH 256K X 4 DRAM AND 512X 4 SAM HIGH PERFORMANCE V52C4258 60 70 80 10 60 ns 70 ns 80 ns 100 ns Max. CAS Access Time, tcAc 15 ns 20 ns 25 ns 25 ns Max. Column Address Access Time, ( t^ ) 30 ns 35 ns 40 ns

Contextual Info: M O S E L V IT E L IC V53C664A 64K x 16 B IT FA ST PAGE MODE BYTE WRITE CMOS DYNAMIC RAM 60/60L 70/70L 80/80L Max. RAS Access Time, tR A r 60 ns 70 ns 80 ns Max. Column Address Access Time, (tr l 4 ) 35 ns 40 ns 45 ns Min. Fast Page Mode Cycle Time, (tp r )

mosel

Abstract: V53C104A V53C104AL mn280
Contextual Info: MOSEL-VITELIC bSE T> MOSEL-VITELIC • 1,3533=11 O G G I R I S TTT ■ V53C104A H IG H P E R FO R M A N C E , L O W P O W ER 2 5 6 K X 4 B IT F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE V53C104A Max. RAS Access Time, tRAr P R E L IM IN A R Y