ASM5I961P Search Results

ASM5I961P Datasheets (3)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
ASM5I961P		Alliance Semiconductor	Low Voltage Zero Delay Buffer		Original	PDF
ASM5I961P-32LR		Alliance Semiconductor	Low Voltage Zero Delay Buffer		Original	PDF
ASM5I961PG-32LR		Alliance Semiconductor	Low Voltage Zero Delay Buffer		Original	PDF

ASM5I961P Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: ASM5I961P July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features reference clock while the ASM5I961P offers an LVPECL Fully Integrated PLL reference clock. Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs LVCMOS Outputs	Original	200MHz 150pS ASM5I961P ASM5I961P	PDF
ASM5I961C Abstract: ASM5I961C-32-ET ASM5I961C-32-LT ASM5I961CG-32-ET ASM5I961CG-32-LT ASM5I961P PS1510 Contextual Info: ASM5I961C July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features reference clock while the ASM5I961P offers an LVPECL Fully Integrated PLL reference clock. Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs LVCMOS Outputs	Original	ASM5I961C ASM5I961P 200MHz ASM5I961C ASM5I961C-32-ET ASM5I961C-32-LT ASM5I961CG-32-ET ASM5I961CG-32-LT PS1510	PDF
ASM5I961C Abstract: ASM5I961P ASM5I961P-32LR ASM5I961PG-32LR Contextual Info: ASM5I961P July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features reference clock while the ASM5I961P offers an LVPECL Fully Integrated PLL reference clock. Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs LVCMOS Outputs	Original	ASM5I961P ASM5I961P 200MHz 150pS ASM5I961C ASM5I961P-32LR ASM5I961PG-32LR	PDF
Contextual Info: ASM5I961C July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features The ASM5I961C is offered with two different input configurations. The ASM5I961C offers an LVCMOS Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance	Original	ASM5I961C ASM5I961C ASM5I961P 200MHz 150pS	PDF