ASM5I961C Search Results

ASM5I961C Datasheets (5)

Part	Manufacturer	Description	Datasheet Type	PDF
ASM5I961C	Alliance Semiconductor	Low Voltage Zero Delay Buffer	Original	PDF
ASM5I961C-32-ET	Alliance Semiconductor	Low Voltage Zero Delay Buffer	Original	PDF
ASM5I961C-32-LT	Alliance Semiconductor	Low Voltage Zero Delay Buffer	Original	PDF
ASM5I961CG-32-ET	Alliance Semiconductor	Low Voltage Zero Delay Buffer	Original	PDF
ASM5I961CG-32-LT	Alliance Semiconductor	Low Voltage Zero Delay Buffer	Original	PDF

ASM5I961C Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
ASM5I961C Abstract: ASM5I961C-32-ET ASM5I961C-32-LT ASM5I961CG-32-ET ASM5I961CG-32-LT ASM5I961P PS1510 Contextual Info: ASM5I961C July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features reference clock while the ASM5I961P offers an LVPECL Fully Integrated PLL reference clock. Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs LVCMOS Outputs	Original	ASM5I961C ASM5I961P 200MHz ASM5I961C ASM5I961C-32-ET ASM5I961C-32-LT ASM5I961CG-32-ET ASM5I961CG-32-LT PS1510	PDF
Contextual Info: ASM5I961C July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features The ASM5I961C is offered with two different input configurations. The ASM5I961C offers an LVCMOS Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance	Original	ASM5I961C ASM5I961C ASM5I961P 200MHz 150pS	PDF
ASM5I961C Abstract: ASM5I961P ASM5I961P-32LR ASM5I961PG-32LR Contextual Info: ASM5I961P July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features reference clock while the ASM5I961P offers an LVPECL Fully Integrated PLL reference clock. Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs LVCMOS Outputs	Original	ASM5I961P ASM5I961P 200MHz 150pS ASM5I961C ASM5I961P-32LR ASM5I961PG-32LR	PDF

Catalog Datasheet

Type

Document Tags

PDF

ASM5I961C

Abstract: ASM5I961C-32-ET ASM5I961C-32-LT ASM5I961CG-32-ET ASM5I961CG-32-LT ASM5I961P PS1510
Contextual Info: ASM5I961C July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features reference clock while the ASM5I961P offers an LVPECL Fully Integrated PLL reference clock. Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs LVCMOS Outputs

Original

ASM5I961C ASM5I961P 200MHz ASM5I961C ASM5I961C-32-ET ASM5I961C-32-LT ASM5I961CG-32-ET ASM5I961CG-32-LT PS1510

PDF

Contextual Info: ASM5I961C July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features The ASM5I961C is offered with two different input configurations. The ASM5I961C offers an LVCMOS Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance

Original

ASM5I961C ASM5I961C ASM5I961P 200MHz 150pS

PDF

ASM5I961C

Abstract: ASM5I961P ASM5I961P-32LR ASM5I961PG-32LR
Contextual Info: ASM5I961P July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features reference clock while the ASM5I961P offers an LVPECL Fully Integrated PLL reference clock. Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs LVCMOS Outputs

Original

ASM5I961P ASM5I961P 200MHz 150pS ASM5I961C ASM5I961P-32LR ASM5I961PG-32LR

PDF