SCAS326 Search Results

CDC305

Abstract: SN74AS305
Contextual Info: CDC305 OCTAL DIVIDEĆBYĆ2 CIRCUIT/CLOCK DRIVER SCAS326A − JUNE 1990 − REVISED NOVEMBER 1995 D D D D D D D OR N PACKAGE TOP VIEW Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin VCC and GND Configurations

CDC305

Abstract: SN74AS305
Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995 D D D D D D D OR N PACKAGE TOP VIEW Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin VCC and GND Configurations

SCAS326A

Abstract: CDC305 CDC305-1N CDC305D CDC305DR CDC305N SN74AS305
Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995 D D D D D D D OR N PACKAGE TOP VIEW Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin VCC and GND Configurations

CDC305

Abstract: SN74AS305
Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995 D D D D D D D OR N PACKAGE TOP VIEW Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin VCC and GND Configurations

CDC305

Abstract: SN74AS305
Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995 D D D D D D D OR N PACKAGE TOP VIEW Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin VCC and GND Configurations

Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995 D D D D D D D OR N PACKAGE TOP VIEW Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin VCC and GND Configurations

Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326 - JUNE 1990 - REVISED MARCH 1994 Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin Vqc and GND Configurations Minimize High-Speed Switching Noise

Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326A.-JUNE 1990 - REVISED NOVEMBER 1995 D OR N PACKAGE fTOP VIEW • Replaces SN74AS305 • Maximum Output Skew of 1 ns • Maximum Pulse Skew of 1 ns • TTL-Compatible Inputs and Outputs • Center-PIn Vcc and GND Configurations

CDC305

Abstract: SN74AS305
Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326 - JUNE 1990 - REVISED MARCH 1994 Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin Vcc and GND Configurations Minimize High-Speed Switching Noise

Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326A- JUNE 1990 - REVISED NOVEMBER 1995 D O R N PACKAGE TOP VIEW R ep l ac es SN74AS305 M a x i m u m O u t p u t S k e w o f 1 ns M a x i m u m Pu l se S k e w o f 1 ns Q 3[ 1 Q 4[ 2 T T L - C o m p a t i b l e I n p u t s and O u t p u t s

SN74ALVCH162245

Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
Contextual Info: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9

SN74HC02 Spice model

Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
Contextual Info: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest

Contextual Info: CDC329A 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY SCAS328A - DECEMBER 1992 - REVISED NOVEMBER 1995 • Low Output Skew for Clock-Dlstributlon and Clock-Generation Applications D OR OB PACKAGE TOP VIEW • TTL-Compatlble Inputs and CMOS-Compatible Outputs

CDC304

Abstract: SN74AS304 Q705
Contextual Info: CDC304 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER S C A S 325 * * * * * Replaces SN74AS304 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1.5 ns TTL-Compatible Inputs and Outputs