LH53B16R00 Search Results

LH53B16R00

Contextual Info: LH53B16R00 CMOS 16M 1M x 16/512K × 32 MROM FEATURES PIN CONNECTIONS • 1,048,576 × 16 bit organization (Word mode: W = VIL) 524,288 × 32 bit organization (Double Word mode: W = VIH) • Access time: 120 ns (MAX.) Access time in page mode: 50 ns (MAX.)

LH5B

Abstract: 3B16 LH53B16R00N Z3D15 LH5S
Contextual Info: SHARP SPEC No. E L 0 7 6 0 S 8 ISSUE: Nov. 10 1995 To ; S P E Product Type C 1 F 1 C A 1 6M bit L 5 H B T 1 O M A SK 7 R N S R O M X X f ilodel No. LH53B16R00N &This specifications contains 14 pages including the cover and appendix. If you have any objections, please contact us before issuing purchasing order.

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh537

Abstract: 42DIP lh533200 LH535g
Contextual Info: MEMORIES • Mask ROMs Process CMOS ★ U n d e r development MEMORIES ★ Under developm ent Configuration Process Capacity (wortsxbits Access time (ns) MAX. Model No. Pinout LH-538VXX 100 100 5 ± 10% 32DIP/32SOP/32TSOPÎII) Normal 120 60 5 ± 10% L H 5 3 8 3 0 0 C D /C W C S Æ S H

flash 64m

Contextual Info: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161

MB834000

Abstract: M5M23160 MB834100 MB838000 MB832000 SGS M27C256 I27C256 KM23C1010 M27C256 M27C256 intel
Contextual Info: CROSS-REFERENCE GUIDE 1. EPROM CAPACITY CONFIGRUATION MACRONIX INTEL AMD N.S. S.G.S. 256K 32K x 8 MX27C256 i27C256 Am27C256 NM27C256 M27C256 512K 64K x 8 MX27C512 i27C512 Am27C512 NM27C512 M27C512 32K x 16 MX27C516 128K x 8 MX27C1000 i27C010 Am27C010 NM27C010

YL 69 moisture

Abstract: YL 38 moisture A18 sot LH53B16R00N D16-D31-pin 70pin ssop LR7L
Contextual Info: SHARP E L 0 7 6 0 3 8 Nov. 10 1995 SPEC No. ISSUE: S P Product Type E C I F 1 6M I C A T bit I O N S MASK ROM LH5B7RXX Model No. _ L H 5 9 B 1 6 R 0 Q N &This specifications contains 14 pages including the cover and appendix. If you have any objections, please contact us before issuing purchasing order.

LQ070T5BG01

Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
Contextual Info: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66

Contextual Info: MEMORIES ★ Capacity Configuration * 1 C om patible with 4 M -bit flash m em ories from A d vanced M icro D evices, Inc. * 2 C om patible with 4 M -bit flash m em ories from Intel Corp. A c c e s s tim e Under development MEMORIES ★ Under development Access time

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

sharp mask rom

Abstract: mask rom compatible pinout
Contextual Info: MEMORIES M ask ROMs ★ Mask ROM Specific Pinout • 3 V 3 .3 V operation Capacity Bit configuration A ccess time • 5 V operation Capacity Bit configuration Access time Under development MEMORES ★ Underdevelopment I Page Mode Specification (Mask ROM Specific Pinout)

sharp mask rom

Contextual Info: LH53C16600 16M Mask ROM Ref No.: NP 188C Issue Date: September 1997 High-Speed 16M-bit Mask-Programmable ROM with Page Mode Operation LH53C16600 • ■ Description The LH53C16600D/N User’s No. : LH-5C76XX is a CMOS 16M-bit mask-programmable ROM organized as 2 097 152 X 8

IR2E27A

Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Contextual Info: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080

nd3060

Contextual Info: CMOS 16M 1M x 16/512K x 32 MROM • Access time: 120 ns (MAX.) Access time in page mode: 50 ns (MAX.) • Supply current: -O p e ra tin g : 180 mA (MAX.) - Standby: 300 [iA (MAX.) 70-PIN SSOP TOP VIEW f N Aq IH 1 • 70 n N c A iC 2 69 n N c a2 68 n N c

LHMD09

Contextual Info: MEMORIES ★ U nderdevelopm ent • Page Mode Specification Mask ROM Specific Pinout • 3 .3 V operation B it C apacity configuration 8M 16M x 8/x 16 x 8/x 16 x 16/x 32 x 8/x 16 32M x 16/x 32 64M x 16/x 32 128M x 16/x 32 Model No. LH53BV8600D/N LH53BV8600T

Contextual Info: CMOS 16M 1M x 16/512K x 32 MROM FEATURES • 1,048,576 x 16 bit organization (Word mode: W = V|L) 524,288 x 32 bit organization (Double Word mode: W = Vm) • Access time: 120 ns (MAX.) Access time in page mode: 50 ns (MAX.) • Supply current: - Operating: 180 mA (MAX.)