8182SXX Search Results

Contextual Info: Preliminary GS8182S18/36D-333/300/250/200/167 18Mb Σ2x1B2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182S08/09/18BD-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182S18D-250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8182S18BD-167

Abstract: GS8182S18BD-200 GS8182S18BD-250 GS8182S18BD-300
Contextual Info: Preliminary GS8182S08/09/18BD-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

GS8182S18

Abstract: GS8182S18D-167 GS8182S18D-200 GS8182S18D-250 GS8182S18D-250I GS8182S18D-267
Contextual Info: GS8182S18D-267/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 267 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS8182S18BD

Contextual Info: Preliminary GS8182S08/09/18BD-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182S18D-250/200/167 SigmaRAM Family Overview me nd ed for Ne w GS8182S18 are built in compliance with the SigmaSIO-II SRAM pinout standard for Separate I/O synchronous SRAMs. They are 18,874,368-bit 18Mb SRAMs. These are the first in a family of wide, very low voltage HSTL I/O SRAMs designed

GS8182S08BD-167

Abstract: GS8182S08BD-200 GS8182S08BD-250 GS8182S08BD-300 GS8182S18BD
Contextual Info: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 18Mb Burst of 2 SigmaSIO DDR-IITM SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

GS8182S36D-167

Abstract: GS8182S36D-200 GS8182S36D-250 GS8182S36D-300 GS8182S36D-333I
Contextual Info: Preliminary GS8182S18/36D-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182S18D-250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 18Mb Burst of 2 SigmaSIO DDR-IITM SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS8182S08/09/18/36BD-400/375/333/300/250/200/167 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

GS8182S36D-200

Abstract: GS8182S36D-250 GS8182S36D-300
Contextual Info: Preliminary GS8182S18/36D-333/300/250/200/167 18Mb Σ2x1B2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

GS818

Abstract: DDR pinout GS8182S08BD-167 GS8182S08BD-200 GS8182S08BD-250 GS8182S08BD-300
Contextual Info: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 18Mb Burst of 2 SigmaSIO DDR-IITM SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package