Untitled
Abstract: No abstract text available
Text: 74HC/HCT107 flip-flops D U A L JK FLIP-F LO P W ITH R E SE T ; N E G A T IV E -E D G E T R IG G E R FEATURES T Y P IC A L • Output capability: standard • I q q category: flip-flops SYM BO L T h e reset {n R is an asy n ch ron ou s active L O W input. W hen L O W , it overrides the
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74HC/HCT107
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74HC-HCT73
Abstract: 43 ef 2 nk
Text: 74HC/HCT73 flip-flops D U A L JK FLIP-FLOP WITH RESET; N E G A T IVE-EDGE T R IG G ER FEATURES T Y P IC A L • Output capability: standard • I q q category: flip-flops G E N E R A L D E S C R IP T IO N The 74HC/HCT73 are high-speed Si-gate CMOS devices and are pin
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74HC/HCT73
74HC-HCT73
43 ef 2 nk
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220 NK
Abstract: 74HC 74HCT 7Z9319
Text: 74HC/HCT107 flip-flops DUAL JK FLIP-FLOP WITH RESET; NEGATIVE-EDGE TRIGGER FEATURES • • TYPICAL Output capability: standard ICC category: flip-flops GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky
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74HC/HCT107
220 NK
74HC
74HCT
7Z9319
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Untitled
Abstract: No abstract text available
Text: 74H C /H C T 242 MSI QUAD BUS TRANSCEIVER; 3-STATE; INVERTING FE A T U R E S T Y P IC A L • inverting 3*state outputs • 2-way asynchronous data bus communication • Output capability: bus driver • ICC category: MSI SYM BOL tPHL./ tP LH propagation delay
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Untitled
Abstract: No abstract text available
Text: 74HC/HCT242 MSI QUAD BUS TRANSCEIVER; 3-STATE; IN VER TIN G FEATURES * * TYPICAL Inverting 3-state outputs 2-way asynchronous data bus communication Output capability: bus driver Iqq category: MSI SYMBOL PARAMETER U NIT CONDITIONS HC HCT 7 10 ns tP H L/ tPLH
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74HC/HCT242
Z93200
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Untitled
Abstract: No abstract text available
Text: 74HC/HCT107 fiip-fiops DUAL JK FLIP-FLOP WITH RESET; NEGATIVE-EDGE TRIGGER FEA TU R E S • • TYPICAL O utput capability: standard I q c category: flip-flops SYMBOL The 74HC/HCT107 are dual negativeedge triggered JK-type flip-flops _ featuring individual J, K, clock nCP
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74HC/HCT107
74HC/HCT107
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