7C386P Search Results

kt 84l

Contextual Info: CY7C385P 7C386P » r CYPR ESS UltraLogic Very High Speed 4K Gate CMOS FPGA Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns

81c78

Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Contextual Info: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M

CY7C385P-2AC

Abstract: CY7C385P-2AI CY7C385P-2JC
Contextual Info: filename:Monday, June 15, 1992 Revision: October 9, 1995 CY7C385P 7C386P UltraLogict Very High Speed 4K Gate CMOS FPGA Features D Very high speed D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies up to 110 MHz

hp 6263

Abstract: pasic380 CY7C382P CY7C384A CY7C385P CY7C385P-1AC CY7C385P-2AI CY7C386P CY7C388P CERAMIC leaded CHIP CARRIER CLCC 68
Contextual Info: « F CY7C385P 7C386P C YPR ESS UltraLogic Very High Speed 4K Gate CMOS FPGA Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays

programmer manual EPLD cypress

Abstract: pASIC380 programming manual EPLD CY7C383A GAL programmer schematic
Contextual Info: filename: Tuesday, August 11, 1992 Revision: October 9, 1995 pASIC380 Family UltraLogict Very High Speed CMOS FPGAs D Robust routing resources Features D Very high speed D D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies

Contextual Info: CY7C385P 7C386P * ^ /C Y P R E S S — Fast, fully a u to m a tic p la ce and route F e a tu re s • Very high speed — W aveform sim u la tio n w ith back a n ­ n otated net delays — L o a d ab le cou n ter freq u en cies g reater th an 150 M H z — PC and w ork station p latform s

Contextual Info: > CYPRESS Features • Full 33V operation • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-8-chip operating frequencies up to 85 MHz — Input + logic cell + output delays under 7 ns • Unparalleled FPGA performance for counters, data path, state machines,