74LS10 TRUTH TABLE Search Results

ttl 74ls10

Abstract: truth table NOT gate 74 74LS10 74LS10 truth table 751A-02 SN54-74LS10 74LS10 TTL 3 input nand gate 74LS10
Contextual Info: SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

74ls10

Abstract: TTL 74LS10 751A-02 SN54-74LS10
Contextual Info: g MOTOROLA SN54/74LS10 TRIPLE 3-INPUT NAND GATE TR IP LE 3-IN P U T NAND GATE Vcc LOW POWER SCHOTTKY Fri [ïïi [ïïï nri ra m m » J SUFFIX CERAMIC CASE 632-08 Ij J LiJ Ij J LlI Ll I Lil LzJ GND .AB .4 ^ N SUFFIX PLASTIC CASE 646-06 D SUFFIX SOIC CASE 751A-02

74LS10

Abstract: 74LS10 truth table Motorola 74LS TTL 74ls10 TTL IC 74 74 c 2 n 3 h all gate ic data 74
Contextual Info: MOTOROLA SN54/74LS10 TRIPLE 3-INPUT NAND GATE TR IPLE 3-IN P U T NAND GATE Vcc LOW POWER SCHOTTKY nri rrn nn rm 1101 m in J SUFFIX CE R A M IC C A SE 632-08 LU LU LU LU H LU LU GND N SUFFIX i f P Ï Ï l CASIE 646-0 D SUFFIX soie CASE 751A-02 5 ORDERING INFORMATION

751A-02

Abstract: TTL 74LS10 3 input nand gate 74LS10 SN54-74LS10
Contextual Info: SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

74LS10 truth table

Contextual Info: g M O TO R O LA SN54/74LS10 R R R R R FI R -= 5 > TRIPLE 3-INPUT N A N D GATE LOW POWER SCHOTTKY LLl LlI ÜJ LlI LlI Li J LI J Suffix — Case 632-08 (Ceramic) N Suffix — Case 646-06 (Plastic) GUARANTEED OPERATING RANGES MIN TYP MAX UNIT V CC SYM B O L

Contextual Info: AVG Semiconductors DDiT Technical Data DV74LS10 DV74ALS10A Triple 3-Input NAND Gates N Suffix Plastic DIP AVG-001 Case This device contains three independent gates, each of which performs the logic NAND function. AVG’s LS operates over extended Vcc from 4.5 to 5.5 V

74LS10 function table

Contextual Info: TOSHIBA TC74HC1QÄP/AF/AFN Triple 3-Input NAND Gate The TC74HC1OA is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

74HC10

Abstract: 74LS10 truth table
Contextual Info: r z 7 S G S -T H O M S O N Ä 7# M 54H C 10 M74HC10 TRIPLE 3-INPUT NAND GATE • HIGHSPEED tPD = 6 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 HA (MAX.) AT Ta = 25 "C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY

74HCT10

Contextual Info: r Z 7 S G S -T H O M S O N È M 54H C T10 M74HCT10 TRIPLE 3-INPUT NAND GATE • HIGHSPEED tpD = 11 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 |iA (MAX.) AT Ta = 25 "C ■ COMPATIBLE WITH TTL OUTPUTS V ih = 2V (MIN.) V il = 0.8V (MAX) ■ OUTPUT DRIVE CAPABILITY

Contextual Info: - TC74HC10AP/AF/AFN TRIPLE 3-INPUT NAND GATE The TC74HC10A is a high speed CMOS 3-IN P U T N AN D G A TE fabricated w ith silicon gate C^M O S technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m ain tain in g the CMOS low power

Contextual Info: S G S -T H O M S O N iD œ a iÊ T IM D Ê I M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE • HIGHSPEED tpD = 6 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 1 HA (MAX.) AT TA = 25 "C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY

74LS10

Abstract: DIP14-P-300-2 TC74HC10A TC74HC10AFN TC74HC10AP
Contextual Info: TOSHIBA TC74HC10AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC10AP, TC74HC10AF, TC74HC10AFN Note The JEDEC SOP (FN) is not available in Japan. TRIPLE 3 -IN P U T NAND GATE The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

of IC 74ls10

Abstract: hc154 hc 154
Contextual Info: TC74HC1OAP/AF/AFN TRI PLE 3-INPUT NAND GATE The TC74HC10A is a high speed CMOS 3 -IN P U T N A N D G A TE fab rica te d w ith silicon g ate C 2 MOS technology. It achieves the high speed o p eratio n s im ila r to equivalent L STT L w hile m a in ta in in g th e CMOS low pow er

M54HC10

Abstract: M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74hc10
Contextual Info: M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

of IC 74ls10

Abstract: triple3-input nand gate M54HCT10 M54HCT10F1R M74HCT10 M74HCT10B1R M74HCT10C1R M74HCT10M1R 74HCT 3-input OR gate 74ls10 IC
Contextual Info: M54HCT10 M74HCT10 TRIPLE 3-INPUT NAND GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

M54HCT10

Abstract: M54HCT10F1R M74HCT10 M74HCT10B1R M74HCT10C1R M74HCT10M1R 74ls10 IC
Contextual Info: M54HCT10 M74HCT10 TRIPLE 3-INPUT NAND GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

of IC 74ls10

Contextual Info: TC74HC10AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC10AP,TC74HC10AF,TC74HC10AFN Triple 3-Input NAND Gate The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

74LS10

Abstract: DIP14-P-300-2 TC74HC10A TC74HC10AF TC74HC10AFN TC74HC10AP 74LS10 truth table
Contextual Info: TO SH IBA TC74HC10AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC10AP, TC74HC10AF, TC74HC10AFN Note The JEDEC SOP (FN) is not available in Japan. TRIPLE 3 -IN PU T NAND GATE The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

74LS10

Abstract: LC74HC10 ic NANDgates
Contextual Info: 1ÌE D I SANYO SE MICONDU CTOR CORP T 7^707t. OQOEblö 1 | ^ V Z l i M i i l CMOS High-Speed Standard Logic LC74HC Series Triple 3-Input NAND Gate 1737B Features The LC74HC10 consists o f 3 identical 3-input NANDgates, Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS10 w ith the

of IC 74ls10

Contextual Info: TC74HC10AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC10AP,TC74HC10AF,TC74HC10AFN Triple 3-Input NAND Gate The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

74HC10

Abstract: M54HC10 M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74HC10 equivalent
Contextual Info: M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

Contextual Info: TOSHIBA TC74HC10AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC10AP, TC74HC10AF, TC74HC10AFN TRIPLE 3 -IN P U T NAND GATE Note The JEDEC SOP (FN) is not available in Japan. The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

Contextual Info: V TC74HC10AP/AF/AFN TRIPLE 3-INPUT NAND GATE T h e T C 7 4 H C 1 0 A is a h i g h s p e e d C M O S 3 - I N P U T NAND GATE f a b r i c a t e d w ith silic o n g a t e C 2 M O S t e c h n o lo g y . It a c h ie v e s the h ig h s p e e d o p e r a ti o n s i m i l a r to

Contextual Info: TOSHIBA TC74HC10AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC10AP, TC74HC10AF, TC74HC10AFN TRIPLE 3 -IN P U T NAND GATE Note The JEDEC SOP (FN) is not available in Japan. The TC74HC10A is a high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology.