74LS INVERTERS Search Results

octal Bilateral Switches

Abstract: MM74HC14M MM74HC138M CD4025BCM MM74HC00M MM74HC74AM MM74HC125M MM74HC04M cd4046bcm cd4052bcm
Contextual Info: 1/3 CMOS LOGIC MM74HC SERIES MM74HCT/U SERIES • HIGH SPEED CMOS TECHNOLOGY, CMOS DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES Part Number Description • HIGH SPEED CMOS TECHNOLOGY, TTL DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES SQP £ ea. Gates & Inverters

IC 74LS14

Abstract: 74ls14 74LSxx ic 74ls13
Contextual Info: M OTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The S N 54LS /74LS 13 and SN 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into

74LS14 not gate

Abstract: 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13
Contextual Info: MOTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The SN 54LS /74LS 13 and S N 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into

lm294oct

Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
Contextual Info: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12

74HCTLS

Contextual Info: Z y tr e x ZX54HCTLS M ZX74HCTLS M February 1985 M Hex Schmitt-Trigger Inverters OBJECTIVE SPECIFICATIONS Features Description • Function, pln-out, speed and drive compatibility with 54/74LS logic family These Schm itt-trigger devices contain six independent

TTL 7414

Abstract: IC sn7414
Contextual Info: TYPES SN5414, SN54LS14, SN7414, SN74LS14 HEX SCHMITT-TRIGGER INVERTERS _ REVISED DECEMBER 1983 SN 5414, SN 54LS14 . . . J OR W PACKAGE S N 7414 . . . J OR N PACKAGE SN 74LS 14 . . . D, J OR N PACKAGE | • Operation from Very Slow Edges

74hctls

Contextual Info: Z y tr e x ZX54HCTLS ZX74HCTLS 05 Hex Inverters with Open-Drain Outputs February 1965 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family The ZX74HCTLS05 and ZX54HCTLS05 contain six inde­

74LS14P

Contextual Info: M IT S U B IS H I LSTTLs M74LS14P HEX SCHMITT TRIGGER INVERTERS DESCRIPTION The M 74LS 14P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing 6 Schm itt trigger inverter circuits. " W FEATURES • Suitable fo r waveform shaping applications

YC213

Abstract: 74HCTLS
Contextual Info: Z v tr e ZX S 4H C TLS ZX 74H C TLS x § m £ Î Hex Inverters February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with S4/74LS logic family These devices contain six independent inverters. They

M74LS14P

Abstract: 74LS14P M74ls14 mitsubishi inverter air conditioning 20-PIN
Contextual Info: M IT S U B IS H I LSTTLs M74LS14P HEX SCHMITT TRIGGER INVERTERS DESCRIPTION The M 74LS 14P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing 6 Schm itt trigger inverter circuits. " W FEATURES INPUT 1A - » [ T • Suitable fo r waveform shaping applications

4049 logic gate

Abstract: 4049 cmos
Contextual Info: :g g í£ ^ Hex Logic Level Down Converters T - X2.^/ FEATURES DESCRIPTION • Modified Input structure allows voltages up to 15V • Function, pinout, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS

Contextual Info: SN54LS353, SN74LS353 DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS BULLETIN NO. Dl-S 12464, OCTOBER 1976 - REVISED MARCH 1988 SN 54LS 353 . . . J OR W PACKAGE SN 74LS 353 . . . D OR N PACKAGE • Inverting Versions of SN54LS2S3, SN74LS253

M74LS05P

Abstract: mitsubishi inverter air conditioning 74LS05P inverter air conditioning mitsubishi mitsubishi air conditioning 20-PIN DIL 00 AM schematic
Contextual Info: M IT S U B IS H I LSTTLs M74LS05P HEX INVERTERS WITH OPEN COLLECTOR OUTPUTS DESCRIPTION The M 74LS 05P is a semiconductor integrated circuit containing 6 open collector o u tp u t inverter circuits. FEATURES • Usable in A N D -T ie connection. • High breakdown input voltage V | ^ 15 V

FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P

Contextual Info: Decoders/Dem uIti plexers 25LS138 25LS139 PIN-OUT DIAGRAMS FEATURES • ■ 25LS 138: 3-Line-to-8 -U ne Decoder 1-of-8 D em u ltiplexer 25LS139: Dual 2-Line-to-4-Line Decoder ■ ■ Dual 1-of-4 D em u ltiplexer Higher Speed compared to 9LS /54LS and 9LS /74LS

54LS

Abstract: 74LS
Contextual Info: SWITCHING CHARACTERISTICS vCc - 5V, r A = 25°c T E S T CONDITIONS PARAMETER FROM INPUT TO OUTPUT Any MIN 54/74LS 54/74S C L =15pF R L = 2K îî C|_=15pF R|_=280ii TYP MAX MIN TYP MAX LEV ELS O F DELAY UNIT 2 ns Propagation delay time tp|_H Low-to-htgh Binary

SN54138

Abstract: SN74LS138 LS138 SN54LS138 SN54S138 SN74S138A gl 1151
Contextual Info: SN54LS138, SN54S138, SN74LS138, SN74S138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D E C E M B E R 1972 — R E V IS E D M A R C H 1988 Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems S N 54LS 138, S N 54S 138 SN 74LS 138, S N 74S 138A

Contextual Info: H D 74LS 138 •3-U n e-to -8-L in e Decoders/Demultiplexers IP IN A R R A N G E M E N T The HD74LS138 decodes one-of-eight line dependent on the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable in­

74ls303

Abstract: 7459 IC TTL sn 7458 IC 7458 64LS 84ls IC 7459 IC 74283 sn 7457
Contextual Info: TTL MSI . TYPES SNS41S3I3. S1I74LS363 DUAL 4-LINE-TO-l-LHftf DATA SILECTOit^MULIU>LEXERS WITH 3-STATE OUTPUTS B U LLETIN NO. DL-S 781246J , O CTO BER 1976 SN 54LS 353 . . . J O R W P A C K A G E SN 74LS 353 . . . J O R N P A C K A G E T O P V |E W Inverting Versions of SN54LS253, SN74LS2S3

Contextual Info: LS T T L D N 74LS Series DN74LS04 D N 74L S 04 Dio74-LS 04 Hex Inverters P-1 • Description D N 7 4 L S 0 4 c o n ta in s six in v e rte r c irc u its. ■ Features • • L ow p o w e r c o n su m p tio n P d = 12m W ty p ic a l H igh sp ee d ( t pd = 9 .5 n s ty p ic a l)

54LS42J

Abstract: cn7a
Contextual Info: SN5442A, SN54LS42, S N 74 4 4 2 A , S N 74LS 42 4-LINE BCD TO 10-LINE DEC IM AL DECODERS M A R C H 1 9 7 4 - R E V IS E D M A R C H • • • All Outputs Are High for Invalid Input Conditions S N 5 44 2A , S N 54LS42 S N 7 4 4 2 A . . . N P AC K A G E SN 74LS42

BU74HC04

Abstract: BU74HC04F 74HC T-43-21
Contextual Info: 4 DE 3> ROHM CO LTD /Affi IC/Standard ICs B U 7 4 H C 0 4 m 7 6 2 6 cm Q00 3t .70 3 H I R H M BU74HC04/BU74HC04F T - 4 3 > - a i Hex Inverter B U 7 4 H C 0 4 F • W fi'tfjiEI/D im ensions Unit : mm BU74HC04, BU74HC04F (i, /\'y >/<-£• T 'f o CMOS IC T'j/lffl 74LS v U - X t l P I U S s iK g , 48fig£

74LS05 equivalent

Abstract: 7405 signetics 7405 74LS05 function table
Contextual Info: Signetics I 7405, LS05, S05 Inverters Hex Inverter Open Collector Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7405 40ns (tPLH) 8ns (tpHL) 12mA 74LS05 17ns (tPUH) 15ns (tpHu) 2.4mA 74S05 5ns (tpLH) 4.5ns (tpHL)

TTL 7414

Abstract: TTL 7414 data 7414 74LS14 function table 7414 hex not 7414 ttl inverter schmitt trigger 7414 7414 equivalent pin configuration 74LS14 ls14
Contextual Info: 7414, LS14 Signetics Schmitt Triggers Hex Inverter Schmitt Trigger Product Specification Logic Products DESCRIPTION The '14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly