74HCT/LS DATASHEET Search Results

HC367

Contextual Info: [ /Title CD74 HC367 , CD74 HCT36 7, CD74 HC368 , CD74 HCT36 8 /Subject (High Speed CD54/74HC367, CD54/74HCT367, CD54/74HC368, CD74HCT368 Data sheet acquired from Harris Semiconductor SCHS181B November 1997 - Revised April 2002 High Speed CMOS Logic Hex Buffer/Line Driver,

Contextual Info: [ /Title CD54 HCT11 , CD74 HC11, CD74 HCT11 /Subject (High CD54/74HC11, CD54/74HCT11 Data sheet acquired from Harris Semiconductor SCHS273A High Speed CMOS Logic Triple 3-Input AND Gate August 1997 - Revised May 2000 Features Description • Buffered Inputs

hc4002

Abstract: compared CMOS TTL Logic Family Specifications
Contextual Info: [ /Title CD74H C4002 /Subject (High Speed CMOS Logic Dual 4Input NOR Gate) CD54/74HC4002 Data sheet acquired from Harris Semiconductor SCHS197C High Speed CMOS Logic Dual 4-Input NOR Gate August 1997 - Revised March 2002 Features Description • Typical Propagation Delay = 8ns at VCC = 5V,

74HC02

Contextual Info: [ /Title CD74H C02, CD74H CT02 /Subject (High Speed CMOS Logic Quad Two- CD54/74HC02, CD54/74HCT02 Data sheet acquired from Harris Semiconductor SCHS125A High Speed CMOS Logic Quad Two-Input NOR Gate March 1998 - Revised May 2000 Features Description • Buffered Inputs

ic hc32

Contextual Info: [ /Title CD54 HCT32 , CD74 HC32, CD74 HCT32 /Subject (High CD54/74HC32, CD54/74HCT32 Data sheet acquired from Harris Semiconductor SCHS274A High Speed CMOS Logic Quad 2-Input OR Gate September 1997 - Revised May 2000 Features Description • Typical Propagation Delay: 7ns at VCC = 5V,

hct30 harris

Contextual Info: [ /Title CD54H C30, CD74H C30, CD74H CT30 /Subject (High Speed CMOS Logic 8- CD54/74HC30, CD54/74HCT30 Data sheet acquired from Harris Semiconductor SCHS121B High Speed CMOS Logic 8-Input NAND Gate August 1997 - Revised March 2002 Features Description • Buffered Inputs

Contextual Info: [ /Title CD74 HC534 , CD74 HCT53 4, CD74 HC564 , CD74 HCT56 CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 Data sheet acquired from Harris Semiconductor SCHS188A January 1998 - Revised May 2000 High Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggered

HC173

Contextual Info: [ /Title CD74H C173, CD74H CT173 /Subject (High Speed CMOS Logic Quad DType CD54/74HC173, CD54/74HCT173 Data sheet acquired from Harris Semiconductor SCHS158C High Speed CMOS Logic Quad D-Type Flip-Flop, Three-State February 1998 - Revised July 2002 Features

ttl Logic Family Specifications

Contextual Info: [ /Title CD74 HC365 , CD74 HCT36 5, CD74 HC366 , CD74 HCT36 6 /Subject (High Speed CD54/74HC365, CD54/74HCT365, CD54/74HC366 Data sheet acquired from Harris Semiconductor SCHS180A November 1997 - Revised May 2000 High Speed CMOS Logic Hex Buffer/Line Driver,

Contextual Info: [ /Title CD74 HC86, CD74 HCT86 /Subject (High Speed CMOS Logic Quad 2-Input EXCL USIVE OR CD54/74HC86, CD54/74HCT86 Data sheet acquired from Harris Semiconductor SCHS137B High Speed CMOS Logic Quad 2-Input EXCLUSIVE OR Gate August 1997 - Revised December 2002

nand schmit trigger

Abstract: application circuits of ic 74hc132
Contextual Info: [ /Title CD74 HC132 , CD74 HCT13 2 /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54/74HC132, CD54/74HCT132 Data sheet acquired from Harris Semiconductor SCHS145B High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised December 2002

4000 series CMOS Logic ICs

Abstract: sn74 series TTL logic gates list 74SC00 HC4000 cmos logic 4000 series Difference between LS, HC, HCT devices cmos 74C00 NAND DATA BOOK CD 4000 FAMILY 74hc family 40H00
Contextual Info: HCMOS Design Considerations SCLA007 April 1996 1 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest

8408801EA

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54/74HC112, CD54/74HCT112 Data sheet acquired from Harris Semiconductor SCHS141E Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised January 2003

harris hct74

Abstract: 74HC74 application 74HC74 74HC74 application note CI 74hc74 pin DIAGRAM OF IC 74HC74
Contextual Info: [ /Title CD54H C74, CD74H C74, CD74H CT74 /Subject (Dual D FlipFlop with Set CD54/74HC74, CD54/74HCT74 Data sheet acquired from Harris Semiconductor SCHS124B Dual D Flip-Flop with Set and Reset Positive-Edge Trigger January 1998 - Revised December 2002 Features

Contextual Info: [ /Title CD74H C21, CD74H CT21 /Subject (High Speed CMOS Logic Dual 4Input CD54/74HC21, CD74HCT21 Data sheet acquired from Harris Semiconductor SCHS131A High Speed CMOS Logic Dual 4-Input AND Gate August 1997 - Revised May 2000 Features Description • Buffered Inputs

ic CD40106

Abstract: cd40106 application notes ten segment display 74HC 74HCT IC family spec 74HC14 oscillator application diagram 74C14 CD40106 PIN OUT TIMEX PT 74hc logic family spec AN-376
Contextual Info: National Semiconductor Application Note 376 Larry Wakeman October 1984 By adopting certain techniques in the design of your CMOS-based logic system you can effect dramatic reductions in the transitional power these zero-quiescent-current devices consume when switching

356 schmitt trigger

Abstract: 74HCT 74LS MM74HCT14 MM74HCT14M MM74HCT14MTC MM74HCT14MTCX MM74HCT14MX MM74HCT14SJ MM74HCT14SJX
Contextual Info: MM74HCT14 Hex Inverting Schmitt Trigger Features Description ƒ ƒ ƒ ƒ ƒ ƒ ƒ The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.

Contextual Info: [ /Title CD74 HC27, CD74 HCT27 /Subject (High Speed CMOS Logic CD54/74HC27, CD54/74HCT27 Data sheet acquired from Harris Semiconductor SCHS132A High Speed CMOS Logic Triple 3-Input NOR Gate August 1997 - Revised May 2000 Features Description • Buffered Inputs

Contextual Info: MM74HCT14 Hex Inverting Schmitt Trigger Features Description ̇ ̇ ̇ ̇ ̇ ̇ ̇ The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.

mm74htc

Abstract: MM74HTC14 MM74HTC1 74HCT 74LS MM74HCT14 MKT-N14AREV7 MTC14REV6
Contextual Info: MM74HTC14 Hex Inverting Schmitt Trigger Features Description ƒ ƒ ƒ ƒ ƒ ƒ ƒ The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.

74hc00 oscillator circuit

Abstract: cd40106 application notes CD40106 CD40106 Family specifications CD40106 PIN OUT 74hc00 gate IC 74C14 ic CD40106 CRYSTAL 20 MHZ with 74hc14 74HC374
Contextual Info: By adopting certain techniques in the design of your CMOS-based logic system, you can effect dramatic reductions in the transitional power these zero-quiescent-current devices consume when switching. This article describes ways to reduce the power consumption in logic designs using high-speed CMOS ICs. The

HC4002

Contextual Info: [ /Title CD74H C4002 /Subject (High Speed CMOS Logic Dual 4Input NOR Gate) CD54/74HC4002 Data sheet acquired from Harris Semiconductor SCHS197C High Speed CMOS Logic Dual 4-Input NOR Gate August 1997 - Revised March 2002 Features Description • Typical Propagation Delay = 8ns at VCC = 5V,

Contextual Info: [ /Title CD74 HC27, CD74 HCT27 /Subject (High Speed CMOS Logic CD54/74HC27, CD54/74HCT27 Data sheet acquired from Harris Semiconductor SCHS132A High Speed CMOS Logic Triple 3-Input NOR Gate August 1997 - Revised May 2000 Features Description • Buffered Inputs

74HCT11

Abstract: 74hc11
Contextual Info: [ /Title CD54 HCT11 , CD74 HC11, CD74 HCT11 /Subject (High CD54/74HC11, CD54/74HCT11 Data sheet acquired from Harris Semiconductor SCHS273A High Speed CMOS Logic Triple 3-Input AND Gate August 1997 - Revised May 2000 Features Description • Buffered Inputs