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    74AUP2G80GM Search Results

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    74AUP2G80GM Price and Stock

    Nexperia 74AUP2G80GM,125

    IC FF D-TYPE DUAL 1BIT 8XQFN
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    DigiKey 74AUP2G80GM,125 Cut Tape 53 1
    • 1 $0.41
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    74AUP2G80GM,125 Digi-Reel 53 1
    • 1 $0.41
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    74AUP2G80GM,125 Reel
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    Rochester Electronics 74AUP2G80GM,125 23 1
    • 1 $0.1417
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    • 100 $0.1332
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    Rochester Electronics LLC 74AUP2G80GM,125

    IC FF D-TYPE DUAL 1BIT 8XQFN
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    DigiKey 74AUP2G80GM,125 Bulk 2,036
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    NXP Semiconductors 74AUP2G80GM,125

    Flip Flop D-Type Pos-Edge Push-Pull 2-Element 8-Pin XQFN EP T/R
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    Verical 74AUP2G80GM,125 74,162 2,492
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    74AUP2G80GM,125 43,008 2,492
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    Rochester Electronics 74AUP2G80GM,125 118,171 1
    • 1 $0.1417
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    74AUP2G80GM Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP2G80GM NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G80GM NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-2, QFN-8, FF/Latch Original PDF
    74AUP2G80GM Philips Semiconductors Low-power dual D-type flip-flop, positive-edge trigger Original PDF
    74AUP2G80GM,125 NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse Original PDF
    74AUP2G80GM,125 NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT-902-1, XQFN-8, FF/Latch Original PDF

    74AUP2G80GM Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 8 — 21 January 2013 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80

    Dual D-type flip-flop positive-edge trigger

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 03 — 28 March 2008 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 Dual D-type flip-flop positive-edge trigger

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 04 — 2 June 2008 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 6 — 7 December 2011 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GT JESD78
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 5 — 5 October 2010 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GT JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 7 — 14 June 2012 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80

    VSSOP8

    Abstract: XSON8 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 01 — 25 August 2006 Product data sheet 1. General description The 74AUP2G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP2G80 74AUP2G80 VSSOP8 XSON8 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187

    74AUP2G80DC

    Abstract: SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80
    Text: SLG74LB2G80 GreenLIBTM DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP General Description Features The GreenLIB provides a low-power, low-voltage dual • Pb-Free / RoHS Compliant positive-edge-triggered D-type flip-flop. When data at the • Halogen-Free data D input meets the setup time requirement, the data is


    Original     		PDF SLG74LB2G80 LB2G80 000-0074LB2G80-11 74AUP2G80DC SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 02 — 1 August 2007 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187