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Rochester Electronics LLC 74AUP1G00GF,132 IC GATE NAND
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DigiKey	74AUP1G00GF,132	Bulk	40,000		2,340	1 - 10 - 100 - 1000 - 10000 $0.13	Buy Now
Nexperia 74AUP1G00GF,132 IC GATE NAND 1CH 2-INP 6XSON
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DigiKey	74AUP1G00GF,132	Reel				1 - 10 - 100 - 1000 - 10000 -	Buy Now
	74AUP1G00GF,132	Digi-Reel			1	1 $0.46 10 $0.46 100 $0.46 1000 $0.46 10000 $0.46	Buy Now
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Verical	74AUP1G00GF,132		40,000		2,863	1 - 10 - 100 - 1000 - 10000 $0.131	Buy Now
Rochester Electronics	74AUP1G00GF,132		40,000		1	1 $0.1233 10 $0.1233 100 $0.1159 1000 $0.1048 10000 $0.1048	Buy Now

74AUP1G00GF Datasheets (3)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
74AUP1G00GF		NXP Semiconductors	Low-power 2-input NAND gate		Original	PDF
74AUP1G00GF		Philips Semiconductors	Low-power 2-input NAND gate		Original	PDF
74AUP1G00GF,132		NXP Semiconductors	74AUP1G00 - IC AUP/ULP/V SERIES, 2-INPUT NAND GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate		Original	PDF

74AUP1G00GF Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74AUP1G00GW Abstract: 74AUP1G00 74AUP1G00GF 74AUP1G00GM Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 3 — 7 October 2010 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G00 74AUP1G00 74AUP1G00GW 74AUP1G00GF 74AUP1G00GM	PDF
Untitled Abstract: No abstract text available Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	74AUP1G00 74AUP1G00	PDF
SOT-353 Abstract: No abstract text available Text: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V	Original	74AUP1Gxx 74AUP1G86FZ4-7 DFN1410 SN74AUP1G86DRYR 74AUP1G86GM 74AUP1G86FW4-7 DFN1010 SN74AUP1G86DSFR 74AUP1G86GF 74AUP1G125SE-7 SOT-353	PDF
74AUP1G00 Abstract: 74AUP1G00GF 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203 Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 02 — 29 June 2006 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G00 74AUP1G00 74AUP1G00GF 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203	PDF
Untitled Abstract: No abstract text available Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 02.00 — 16 May 2006 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G00 74AUP1G00	PDF
JESD22-A114 Abstract: No abstract text available Text: 74AUP1G08 Low-power 2-input AND gate Rev. 02.00 — 16 May 2006 Product data sheet 1. General description The 74AUP1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G08 74AUP1G08 JESD22-A114	PDF
Untitled Abstract: No abstract text available Text: 74AUP1G02 Low-power 2-input NOR gate Rev. 02.mm — 16 May 2006 Product data sheet 1. General description The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G02 74AUP1G02	PDF
Untitled Abstract: No abstract text available Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	74AUP1G00 74AUP1G00	PDF
NXP MARKING Abstract: No abstract text available Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 4 — 15 November 2011 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G00 74AUP1G00 NXP MARKING	PDF
Untitled Abstract: No abstract text available Text: 74AUP1G32 Low-power 2-input OR gate Rev. 02 — 2 August 2005 Product data sheet 1. General description The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G32 74AUP1G32	PDF
Untitled Abstract: No abstract text available Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 5 — 16 March 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	74AUP1G00 74AUP1G00	PDF