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    74HCT1 Price and Stock

    Texas Instruments SN74HCT165PWR

    8-BIT PARALLEL-IN/SERIAL-OUT SHI
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    DigiKey SN74HCT165PWR Digi-Reel 9,303 1
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    SN74HCT165PWR Cut Tape 9,303 1
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    SN74HCT165PWR Reel 6,000 2,000
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    Vyrian SN74HCT165PWR 88,837
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    Texas Instruments SN74HCT14DBR

    IC INVERT SCHMITT 6CH 1IN 14SSOP
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    SN74HCT14DBR Reel 4,000 2,000
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    Rochester Electronics SN74HCT14DBR 16,523 1
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    Vyrian SN74HCT14DBR 6,412
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    Nexperia 74HCT1G66GV-Q100H

    IC SWITCH SPST-NOX1 95OHM SC74A
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    DigiKey 74HCT1G66GV-Q100H Cut Tape 2,763 1
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    74HCT1G66GV-Q100H Digi-Reel 2,763 1
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    Rochester Electronics 74HCT1G66GV-Q100H 2,900 1
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    onsemi MC74HCT138ADR2G

    IC DECODER/DEMUX 1X3:8 16SOIC
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    DigiKey MC74HCT138ADR2G Digi-Reel 1,857 1
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    MC74HCT138ADR2G Cut Tape 1,857 1
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    Texas Instruments CD74HCT151M96

    IC MULTIPLEXER 1 X 8:1 16SOIC
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    DigiKey CD74HCT151M96 Digi-Reel 1,247 1
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    CD74HCT151M96 Cut Tape 1,247 1
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    ComSIT USA CD74HCT151M96 3,433
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    74HCT1 Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74HCT1 Philips Semiconductors 10-to-4 line priority encoder Original PDF
    74HCT10 Philips Semiconductors Triple 3-Input NAND Gate Original PDF
    74HCT107 Philips Semiconductors Dual JK flip-flop with reset negative-edge trigger Original PDF
    74HCT107D Philips Semiconductors Dual JK flip-flop with reset negative-edge trigger Original PDF
    74HCT107D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74HCT107D,652 NXP Semiconductors Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger; TTL Enabled ; Fmax: 73 MHz; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 16 ns; Voltage: 4.5-5.5V; Package: SOT108-1 (SO14); Container: Bulk Pack, CECC Original PDF
    74HCT107D,653 NXP Semiconductors Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger; TTL Enabled ; Fmax: 73 MHz; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 16 ns; Voltage: 4.5-5.5V; Package: SOT108-1 (SO14); Container: Reel Pack, SMD, 13", CECC Original PDF
    74HCT107DB Philips Semiconductors Dual JK Flip-Flop with Reset, Negative-Edge Trigger Original PDF
    74HCT107D-Q100 NXP Semiconductors Dual JK flip-flop with reset; negative-edge trigger Original PDF
    74HCT107D-Q100J NXP Semiconductors 74HCT107D-Q100 - 74HCT107D-Q100 - Dual JK flip-flop with reset; negative-edge trigger Original PDF
    74HCT107D-T Philips Semiconductors Dual JK flip-flop with reset negative-edge trigger Original PDF
    74HCT107D-T Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74HCT107DW Philips Semiconductors Dual JK flip-flop with reset, negative-edge trigger Original PDF
    74HCT107N Philips Semiconductors Dual JK flip-flop with reset negative-edge trigger Original PDF
    74HCT107N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74HCT107N,652 NXP Semiconductors Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger; TTL Enabled ; Fmax: 73 MHz; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 16 ns; Voltage: 4.5-5.5V; Package: SOT27-1 (DIP14); Container: Bulk Pack, CECC Original PDF
    74HCT107PW Philips Semiconductors Dual JK Flip-Flop with Reset, Negative-Edge Trigger Original PDF
    74HCT107U Philips Semiconductors Dual JK flip-flop with reset negative-edge trigger Original PDF
    74HCT109 Philips Semiconductors Dual J invertedK flip-flop with set and reset positive-edge trigger Original PDF
    74HCT109D Philips Semiconductors Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger Original PDF
    ...

    74HCT1 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    IC 74HC112

    Abstract: 74HC112
    Text: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54/74HC112, CD54/74HCT112 Data sheet acquired from Harris Semiconductor SCHS141A Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised May 2000


    Original     		CD54/74HC112, CD54/74HCT112 SCHS141A HC112 HCT112 loSZZU001B, SDYU001N, SCET004, SCAU001A, CD74HC112E IC 74HC112 74HC112 PDF

    74HC109

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54/74HC109, CD54/74HCT109 Data sheet acquired from Harris Semiconductor SCHS140A Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised May 2000 Features


    Original     		CD54/74HC109, CD54/74HCT109 SCHS140A HC109 HCT109 SCLA008 SZZU001B, SDYU001N, SCET004, SCAU001A, 74HC109 PDF

    CD74HC138MT

    Abstract: CD74HC138M96E4 74HC138
    Text: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


    Original     		CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 SCHS147I CD54HC138F3A CD54HC238F3A CD54HCT138F3A CD54HCT238F3A CD74HC138E CD74HC138MT CD74HC138M96E4 74HC138 PDF

    74HC

    Abstract: 74HC126 74HC1G126 74HC1G126GV 74HC1G126GW 74HCT126 74HCT1G126 74HCT1G126GV 74HCT1G126GW
    Text: 74HC1G126; 74HCT1G126 Bus buffer/line driver; 3-state Rev. 04 — 20 July 2007 Product data sheet 1. General description The 74HC1G126 and 74HCT1G126 are high-speed, Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is


    Original     		74HC1G126; 74HCT1G126 74HC1G126 74HCT1G126 74HC126 74HCT126. HCT1G126 74HC 74HC1G126GV 74HC1G126GW 74HCT126 74HCT1G126GV 74HCT1G126GW PDF

    21A1

    Abstract: 74LV125DB 74HC125 74HCT125 74LV125 74LV125D 74LV125N 74LV125PW JESD22-A114E
    Text: 74LV125 Quad buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74LV125 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC125 and 74HCT125. The 74LV125 provides four non-inverting buffer/line drivers with 3-state outputs. The


    Original     		74LV125 74LV125 74HC125 74HCT125. 21A1 74LV125DB 74HCT125 74LV125D 74LV125N 74LV125PW JESD22-A114E PDF

    74HC123

    Abstract: 74HCT123 74LV123 74LV123BQ 74LV123D 74LV123DB 74LV123N 74LV123PW SOT736-1
    Text: 74LV123 Dual retriggerable monostable multivibrator with reset Rev. 05 — 8 November 2007 Product data sheet 1. General description The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which


    Original     		74LV123 74LV123 74HC123; 74HCT123. 74HC123 74HCT123 74LV123BQ 74LV123D 74LV123DB 74LV123N 74LV123PW SOT736-1 PDF

    CD54HC158

    Abstract: CD74HC158 HC157 HC158
    Text: [ /Title CD74H C157, CD74H CT157, CD74H C158, CD74H CT158 /Subject (High Speed The CD54HC158 and CD74HC158 are obsolete and no longer are supplied. CD54/74HC157, CD54/74HCT157, CD54/74HC158, CD54/74HCT158 Data sheet acquired from Harris Semiconductor SCHS153B


    Original     		CD74H CT157, CT158) CD54HC158 CD74HC158 CD54/74HC157, CD54/74HCT157, HC157 HC158 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


    Original     		HC138 HCT13 HC238 HCT23 CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 SCHS147I CD54HC138F3A PDF

    SCHS142F

    Abstract: 74HC123 74HC123 timing application circuits of ic 74HC123 CD54HC123F3A CD54HCT123F3A CD74HC123E CD74HC123M CD74HC123M96 CD74HC123MT
    Text: [ /Title CD74 HC123 , CD74 HCT12 3, CD74 HC423 , CD74 HCT42 3 /Subject (High Speed CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423 Data sheet acquired from Harris Semiconductor SCHS142F September 1997 - Revised October 2003 High-Speed CMOS Logic Dual Retriggerable


    Original     		HC123 HCT12 HC423 HCT42 CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423 SCHS142F CD54HC123F3A SCHS142F 74HC123 74HC123 timing application circuits of ic 74HC123 CD54HC123F3A CD54HCT123F3A CD74HC123E CD74HC123M CD74HC123M96 CD74HC123MT PDF

    HC192

    Abstract: No abstract text available
    Text: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163D September 1997 - Revised December 2002 High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters


    Original     		CD54/74HC192, CD54/74HC193, CD54/74HCT193 SCHS163D HC192, HC193 HCT193 5962-9084801MEA 9084801MEAS2035 CD54HCT193F3A HC192 PDF

    CD74HCT138/238

    Abstract: No abstract text available
    Text: Technical Data File N um b er CD54/74HC138, CD54/74HCT138 CD54/74HC238, CD54/74HCT238 1477 HARRIS SEMICOND SECTOR 57E D B 4302E71 DQlTSTh 0 « H A S High-Speed CMOS Logic H C /H C T H C /H C T 238 138 m -v o d f i i ; 12 Y3 - l i — Y4 - y - v s Y6 — — Y7


    OCR Scan     		CD54/74HC138, CD54/74HCT138 CD54/74HC238, CD54/74HCT238 4302E71 54/74H CD54/74HCT138 54/74HC 54/74HC S4/74HC CD74HCT138/238 PDF

    74HC123

    Abstract: 74HC123D 74hc123 application note 74hc123 application notes 74HCT123D 74HCT123N 74HCT423 74HC123N 74HC423 74HCT123
    Text: 74HC123; 74HCT123 Dual retriggerable monostable multivibrator with reset Rev. 6 — 14 March 2011 Product data sheet 1. General description The 74HC123; 74HCT123 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC


    Original     		74HC123; 74HCT123 74HCT123 HCT123 74HC123 74HC123D 74hc123 application note 74hc123 application notes 74HCT123D 74HCT123N 74HCT423 74HC123N 74HC423 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC139 , CD74 HCT13 9 /Subject (High Speed CMOS Logic Dual 2-to-4 Line Decod CD54/74HC139, CD54/74HCT139 Data sheet acquired from Harris Semiconductor SCHS148B High-Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer September 1997 - Revised May 2000


    Original     		CD54/74HC139, CD54/74HCT139 SCHS148B CD4556B 8409201EA CD54HC139F CD54HC139F3A 8409201EA PDF

    74HC163

    Abstract: hc163 cd74hc161 hct163
    Text: [ /Title CD74 HC161 , CD74 HCT16 1, CD74 HC163 , CD74 HCT16 3 /Subject (High Speed CMOS Logic Presettable Counte rs) /Autho r () /Keywords (High Speed CMOS Logic Presettable Counte rs, High Speed CD54/74HC161, CD54/74HCT161, CD54/74HC163, CD54/74HCT163 Data sheet acquired from Harris Semiconductor


    Original     		CD54/74HC161, CD54/74HCT161, CD54/74HC163, CD54/74HCT163 SCHS154A HC161 HCT161 8607601EA CD54HC163F3A 8607601EA 74HC163 hc163 cd74hc161 hct163 PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC165, GD54/74HCT165 8-BIT PARALLEL-IN/SERIAL-OUT SHIFT REGISTER General Description Pin Configuration These devices are identical in pinout to the 5 4 /74L S 16 5 . This circuit is an 8-bit, parallel-input to serial-output shift register with complementary


    OCR Scan     		GD54/74HC165, GD54/74HCT165 PDF

    HCT163A

    Abstract: 74HCT161 LS161A LS163A MC54HCXXXAJ MC74HCXXXAD MC74HCXXXAN
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HCT161A Presettable Counters High–Performance Silicon–Gate CMOS MC54/74HCT163A The MC54/74HCT161A and HCT163A are identical in pinout to the LS161A and LS163A. These devices may be used as level converters for interfacing


    Original     		MC54/74HCT161A MC54/74HCT163A MC54/74HCT161A HCT163A LS161A LS163A. HCT161A MC54/74HCT161A/D* MC54/74HCT161A/D 74HCT161 LS161A LS163A MC54HCXXXAJ MC74HCXXXAD MC74HCXXXAN PDF

    74HC164N PIN DIAGRAM

    Abstract: 74hc164n 74HCT164 application note 74HC164 74HCT164 74HCT164BQ 74HC164D 74HC164DB 74HCT164D 74HCT164DB
    Text: 74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with JEDEC


    Original     		74HC164; 74HCT164 74HCT164 HCT164 74HC164N PIN DIAGRAM 74hc164n 74HCT164 application note 74HC164 74HCT164BQ 74HC164D 74HC164DB 74HCT164D 74HCT164DB PDF

    74HC163

    Abstract: CP/2014
    Text: 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Rev. 3 — 2 June 2014 Product data sheet 1. General description The 74HC163; 74HCT163 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked


    Original     		74HC163; 74HCT163 74HCT163 HCT163 74HC163 CP/2014 PDF

    74HC163

    Abstract: CP/2014
    Text: 74HC163-Q100; 74HCT163-Q100 Presettable synchronous 4-bit binary counter; synchronous reset Rev. 1 — 19 June 2014 Product data sheet 1. General description The 74HC163-Q100; 74HCT163-Q100 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops


    Original     		74HC163-Q100; 74HCT163-Q100 74HCT163-Q100 HCT163 74HC163 CP/2014 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74HC175; 74HCT175 Quad D-type flip-flop with reset; positive-edge trigger Rev. 3 — 31 March 2014 Product data sheet 1. General description The 74HC175; 74HCT175 are high-speed Si-gate CMOS devices which are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		74HC175; 74HCT175 74HCT175 HCT175 PDF

    PC 74HC139

    Abstract: No abstract text available
    Text: [ /Title CD74 HC139 , CD74 HCT13 9 /Subject (High Speed CMOS Logic Dual 2-to-4 Line Decod CD54/74HC139, CD54/74HCT139 Data sheet acquired from Harris Semiconductor SCHS148B High-Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer September 1997 - Revised May 2000


    Original     		HC139 HCT13 CD54/74HC139, CD54/74HCT139 SCHS148B CD4556B PC 74HC139 PDF

    74hc153

    Abstract: No abstract text available
    Text: [ /Title CD74H C153, CD74H CT153 /Subject (High Speed CMOS Logic Dual 4Input CD54/74HC153, CD54/74HCT153 Data sheet acquired from Harris Semiconductor SCHS151A High Speed CMOS Logic Dual 4-Input Multiplexer September 1997 - Revised May 2000 Features Description


    Original     		CD74H CT153) CD54/74HC153, CD54/74HCT153 SCHS151A HC153 HCT153 74hc153 PDF

    74HC165

    Abstract: HC165 74HC165 logic diagram
    Text: [ /Title CD74H C165, CD74H CT165 /Subject (High Speed CMOS Logic 8Bit Parallel- CD54/74HC165, CD54/74HCT165 Data sheet acquired from Harris Semiconductor SCHS156A February 1998 - Revised May 2000 High Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register


    Original     		CD74H CT165) CD54/74HC165, CD54/74HCT165 SCHS156A HC165 HCT165 74HC165 74HC165 logic diagram PDF

    ic 74HC164 AND SPECIFICATIONS

    Abstract: ic cmos 74hc164 CD74HC164M 74HCT164 74HC164 HC164 CD54HC164F 74HCT164 diagram
    Text: [ /Title CD74 HC164 , CD74 HCT16 4 /Subject (High Speed CMOS Logic 8-Bit SerialIn/Parallel- CD54/74HC164, CD54/74HCT164 Data sheet acquired from Harris Semiconductor SCHS155A High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register October 1997 - Revised May 2000


    Original     		HC164 HCT16 CD54/74HC164, CD54/74HCT164 SCHS155A HC164 HCT164 ic 74HC164 AND SPECIFICATIONS ic cmos 74hc164 CD74HC164M 74HCT164 74HC164 CD54HC164F 74HCT164 diagram PDF