7400F Search Results

MC7479F

Abstract: MC7479 MC5479 BA 811 MC5479F diagram pulsa
Contextual Info: / D U A L T Y P E D F L IP - F L O P M T T L MC5400F/7400F series M C 5 4 7 9 F* M C 7 4 7 9 F* T h is dual type 0 flip -flo p triggers o n the posi­ tive edge o f the c lo c k input. D u r in g the clock transition the state o f th e D in p u t is transferred

MC7400

Abstract: MC5400F MC7400F MC5400
Contextual Info: Mî t L MC5400F/7400F series Q U A D 2-IN PU T " N A N D " G A T E MC5400F* 7400F* I 1 / 4 O F C I R C U I T SH O W N This device consists of four 2-input N A N O gates. Each gate m ay be used as an inverter, or tw o gates may be cross-coupled to form bistable circuits.

Alps Tact Switch

Abstract: quanta inverter NT 101 MC5402 MC5402F MC7402 MC7402F MCS-40
Contextual Info: f a U A D 2-INPUT " N O R " G A T E ^ Ì ^ M T T L MC54OOF/7400F series MC5402F * MC7402F * This device consists of four 2-input N O R gates. Each gate may be used as an inverter, or tw o gates mav be cross-coupled to form bistable circuits. 1/4 OF CIRCUIT SHOWN

Contextual Info: Q UAD 2-INPUT "N A N D ” GATE W ITH OPEN COLLECTOR MTTL MC5400F/7400F series MC5401F* MC7401F* 1 / 4 O F C IR C U IT S H O W N This device consists of four 2-input N A N D gales with no output pullup network. It can be used where the Wired-OR function is required, or for driving dis>

Contextual Info: JD D U A L «-IN P U T " N A N O " G A T E M T T L MC5400F/7400F series MC5420F* MC7420F* I 1 / 2 O F C IR C U IT SH O W N * This device consists of two 4-input N A N O gates. These gates may be cross-coupled to form a set-reset flip-flop. P ositive L og ic: a - 1 • 1 2 • 1 3 • 14

Contextual Info: / D U A L 4-1NPUT "N A N O " B U FFER MTTL MC5400F/7400F series ] I MC5440F * MC7440F * This device consists of two 4-input N A N O power gate circuits. Each gate is designed for driving high fan-out loads <30 . 1/2 O F C IR C U IT SHOWN P ositiva L o g ic : 2 » 1 • 1 2 • 1 3 • 14

Contextual Info: C M T T L MC5400F/7400F series DUAL J-K FLIP-FLOP MC5473F* MC7473F* J 14— C LO C K 1 -< This negative-edge-clocked dual J-K flip-flop operates on the masterslave principle. The device is quite useful for simple registers and count­ ers where multiple J and K inputs are not required.

Contextual Info: / D U A L 2-W IDE 2-IN P U T "A N D -O R -IN V E R T " G A T E M T T L MC5400F/7400F series | V. MC5451F* MC7451F* 1 /2 O F CIRCU IT SHOWN This device co n sists o f tw o AND O R IN V ER T gates. Each gate is m ade u p o f tw o 2 -in p u t AND gates O R ed to g eth er and inverted.

MC5400F

Abstract: MC5460 MC5460F MC7460 MC7460F 7400F MC5450 7453
Contextual Info: D ou/ U A L 4-IN PU T E X P A N D E R \ FO R ",AND-OR I N V E R T " G A T E S \ M TTL MC5400F/7400F series MC5460F* MC7460F* I I / 2 0 F C IR C U IT SHO W N T h is device consists of two 4-input O R expanders for use w ith the A N D -O R -IN V E R T gates. A maxi­

mc5400f

Abstract: MC5453 coa 6 pins IC MC5453F MC7453 MC7453F
Contextual Info: y EXZ D ^ N v EWR?“ r EUT\ M T T L MC5400F/7400F series MC5453F* MC7453F* T h i s d e v ic e c o n s i s t s o f f o u r 2 i n p u t A N D g a t e s O R e d to ge th e r and in v e r t e d Up to fo u r M C5480/7460 e x p a n d e r g a t e s m a y b e O R e d w it h t h e d e v ic e a t t h e

MC5400F

Abstract: C5450
Contextual Info: I DUAL41NPU TEXPAN DER / F O R "A N D -O R I N V E R T " G A T E S \ M TTL MC5400F/7400F series MC5460F* MC7460F* I This device consists of two 4-input O R expanders for use with the A N D - O R - IN V E R T gates. A maxi­ mum of four expander gates can be added to the

Contextual Info: D U A L 2-WIDE 2-IN PU T 'A N D -O R -IN V E R T ” G A T E MC5451FMC7451F* \ M T T L MC5400F/7400F series T h is 1 /2 O F C I R C U I T S H O W N d e v ice c o n sists o f tw o A N D O R I N V E R T gates. Ea ch gate is m ade u p o f tw o 2 -in p u t A N D gates

Contextual Info: / D U A L T Y P E D F L IP -F L O P M T T L MC5400F/7400F series MC5479F* MC7479F* This dual type 0 flip-flop triggers on the posi­ tive edge of the clock input. During the clock transition the state of the D input is transferred to the Q output. The device is useful in shift

MC5473F

Abstract: MC7473F MC7473 7400F MC5473 MC747
Contextual Info: \ □U A L J-K FLIP-FLOP M TTL MC5400F/7400F series M C5473F* M C7473F* T h is negative-edge-clocked dua l J -K flip -flo p operates o n the m aster­ 14 — C LO C K 1 -< K 3— R ESE T *n Q — 13 2 -7— Q —9 K 10 — S —8 J slave principle. T h e device is q u ite useful fo r sim p le registers a n d c o u n t ­

Contextual Info: C aUAD 2-INPUT "N O R " GATE MTTL MC5400F/7400F series MC5402F* MC7402F * 1/4 OF CIRCUIT SHOWN 4 k l 4 k § This device consists o f fo u r 2 -in p u t NOR gates. Each gate m ay be used as an inverter, o r tw o gates m ay be cross-coupled to fo rm bistable circuits.

Contextual Info: J' Q U A D 2 -IN PU T "N A N D " G A T E ] MTTL MC5400F/7400F series MC5400F* 7400F* I 1/4 O F C IR C U IT SHOWN T h is device consists of four 2-input N A N D gates. Each gate may be used as an inverter, or two gates may be cross-coupled to form bistable circuits.

MC7472

Contextual Info: C M T T L MC5400F/7400F series J-K F L IP -F L O P MC5472F* MC7472F* T h is negative-edge-clocked J-K flip-flop operates on the master-slave principle. Three K inputs are A N D ed together, and three J inputs we A N D e d together. S E T and R E S E T inputs are also available. The device

Contextual Info: t r i p l e 3-INPUT " N A N D " g a t e Ì ^ MTTL MC5400F/7400F series MC5410F* MC7410F* This device consists of three 3-input N A N D gates. Each gate may be used as an inverter, or two gates may be cross-coupled to form bistable circuits. Positive Log ic :

Contextual Info: 4 W I0E 2-INPUT "AND-O R-IN VERT" GATE \ MTTL MC5400F/7400F series MC5454F* MC7454F* T h is device c on sists of l o u r 2 -in p u t A N D gates O R e d together and inverted. Positive L o g ic . 1 2 - <3 • sT V <6 • 7 + 6 . 9 ) ♦ (13 • 14) Negative Logic

MC5430

Abstract: CT-070-50 MC5430F MC7430 MC7430F 7400F MC5400F dimer 8-input AND logic
Contextual Info: 8-INPUT "N AN D" GA TE \ MTTL MC5400F/7400F séries M C 5 4 3 0 F* M C 7 4 3 0 F* T h is d evice is an 8 -in p u t N A N D gate. It is u sefu l w h en processing a large n u m b er o f va ria b le s, such as in en coders and decoders. * 2- 2-3 . 5-6 7 . 8 . 9. 10

MMD7000

Abstract: MC5400F MC5420 MC5420F MC7420 MC7420F mttl
Contextual Info: s * D U A L 4 - IN P U T " N A N O " G A T E M TTL MC5400F/7400F series MC5420F* MC7420F* 1 /2 O F C IR C U IT SH OW N T h is d e v ice c o n sists o f tw o 4 -in p u t N A N O gates. T hese gates m ay be cro ss-co u p led to fo rm a set-reset flip -flo p .

MC7454

Abstract: MC5454 MC5454F MC5400F MC54 MC7454F
Contextual Info: 4 -W IO E 2 -IN P U T "A N D -O R -IN V E R T " G A T E \ M T T L MC5400F/7400F series MC5454F* MC7454F* T h i s d e v ic e c o n s is t s o f f o u r O R e d t o g e t h e r a n d in v e r te d . 2 - in p u t AND k 12 - 0 +6 • 6 +7) « In p u t L o a d in g

MC7410

Abstract: MC5400F MC5410 MC5410F MC7410F mc741
Contextual Info: T R I P L E 3 - IN P U T " N A N D " G A T E I M T T L MC5400F/7400F sories M C 5 4 Ï0 F * M C7410F* 1 / 3 O F C IR C U IT S H O W N T h is device c o n sists o f three 3 -in p u t N A N D gates. E ac h gate m a y be used as an inverter, o r t»»o gates

COPE

Abstract: MC5400F MC5450 MC5450F MC7450F
Contextual Info: EX PA N D A B LE DU A L 2-W ID E 2 IN P U T " A N O - O R - IN V E R T " G A T E _ M TTL MC5400F/7400F series MC5450F* MC7450F* 1/2 O F C IR C U IT S H O W N * T h is device consists of tw o A N D - O R I N V E R T gates, one of w hich is O R expandable. Each gate is made up