71V532 Search Results

Contextual Info: 32K x 32, 3.3V SYNCHRONOUS SRAM WITH 3.3V/2.5V PIPELINED OUTPUTS AND INTERLEAVED/LINEAR BURST COUNTER Integrated D evice Technology, Inc. FEATURES: PRELIMINARY 71V532 The 71V532 SRAM contains write, data, address, and control registers. Internal logic allows the SRAM to generate

AZ 280 chip

Contextual Info: Integrated Device Technology, Inc. 32K x 32, 3.3V SYNCHRONOUS SRAM WITH 3.3V/2.5V PIPELINED OUTPUTS AND INTERLEAVED/LINEAR BURST COUNTER FEATURES: • 32K x 32 memory configuration • Supports high performance system speed - up to 133 MHz 4.5ns Clock-to-Data Access in Pipelined Mode

AZ 280 chip

Contextual Info: Integrated Device Technology, Inc. 32K x 32, 3.3V SYNCHRONOUS SRAM WITH 3.3V/2.5V PIPELINED OUTPUTS AND INTERLEAVED/LINEAR BURST COUNTER FEATURES: PRELIMINARY 71V532 The 71V532 SRAM contains write, data, address, and control registers. Internal logic allows the SRAM to generate

71V532

Abstract: IN3616
Contextual Info: 32K x 32, 3.3V SYNCHRONOUS SRAM WITH 3.3V/2.5V PIPELINED OUTPUTS AND INTERLEAVED/LINEAR BURST COUNTER FEATURES: PRELIMINARY 71V532 The 71V532 SRAM contains write, data, address, and control registers. Internal logic allows the SRAM to generate a self-timed write based upon a decision which can be left until