DDR2-400
Abstract: DDR2-533 DDR2-667 EDE5116AFSE EDE5116AFSE-4A-E EDE5116AFSE-5C-E EDE5116AFSE-6E-E
Text: DATA SHEET 512M bits DDR2 SDRAM EDE5116AFSE 32M words x 16 bits Features • Density: 512M bits • Organization 8M words × 16 bits × 4 banks • Package: 84-ball FBGA Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 1.8V ± 0.1V • Data rate: 667Mbps/533Mbps/400Mbps (max.)
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EDE5116AFSE
84-ball
667Mbps/533Mbps/400Mbps
M01E0107
E0705E51
DDR2-400
DDR2-533
DDR2-667
EDE5116AFSE
EDE5116AFSE-4A-E
EDE5116AFSE-5C-E
EDE5116AFSE-6E-E
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Untitled
Abstract: No abstract text available
Text: 1GB DDR2 667 VLP SDRAM UDIMM Part Number Bandwidth Speed Grade 78.01G9O.42K 5.3GB/sec Max CAS Frequency Latency 333MHz CL5 667Mbps Density Organization 1GB 128Mx64 Component Number of Composition Rank 128Mx8*8
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01G9O
333MHzÂ
667MbpsÂ
128Mx64Â
128Mx8
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lpddr
Abstract: FCRAM DDR2 x32 ddr1 ram 200806 256-MBIT
Text: RAM’s Power Consumption Comparison #1 Power Consumption: FCRAM vs. Equivalent Memories example Conditions： 256M-bit, BL=8, R:W=1:1, 4-bank interleave, 2.6GByte/s Power Consumption (mW) z z z z DDR2: 2pcs, x16, 667Mbps, CL=12pF, ODT=50ohm DDR1: 2pcs, x32, 333Mbps, CL=12pF
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256M-bit,
667Mbps,
50ohm
333Mbps,
2008FUJITSU
800Mbps,
lpddr
FCRAM
DDR2 x32
ddr1 ram
200806
256-MBIT
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MAX3920
Abstract: No abstract text available
Text: 19-1853; Rev 2; 12/02 +3.3V, 10.7Gbps 1:16 Deserializer with LVDS Outputs Features ♦ Supports Serial Data Rates Up to 10.7Gbps ♦ 10Gbps/10.7Gbps Serial to 622Mbps/667Mbps Parallel Conversion ♦ Single +3.3V Supply ♦ 900mW Operating Power ♦ CML Serial Clock and Data Inputs
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10Gbps/10
622Mbps/667Mbps
900mW
SONET/OC-192
SDH/STM-64
MAX3950EGK
622Mbps
PD15SDI+
MAX3950
MAX3920
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bt 109
Abstract: No abstract text available
Text: DATA SHEET 512M bits DDR2 SDRAM EDE5108AGBG 64M words x 8 bits Features • Density: 512M bits • Organization 16M words × 8 bits × 4 banks • Package: 60-ball FBGA Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 1.8V ± 0.1V • Data rate: 667Mbps/533Mbps (max.)
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EDE5108AGBG
60-ball
667Mbps/533Mbps
M01E0107
bt 109
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MAX3920
Abstract: maxim 1999 circuit diagram MAX3940 MAX3950 MAX3950EGK MAX3925
Text: 19-1853; Rev 0; 11/00 +3.3V, 10.7Gbps 1:16 Deserializer with LVDS Outputs Features ♦ Supports Serial Data Rates Up to 10.7Gbps ♦ 10Gbps/10.7Gbps Serial to 622Mbps/667Mbps Parallel Conversion ♦ Single +3.3V Supply ♦ 900mW Operating Power ♦ CML Serial Clock and Data Inputs
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10Gbps/10
622Mbps/667Mbps
900mW
SONET/OC-192
SDH/STM-64
MAX3950EGK
622Mbps
PD15SDI+
10x10x0
MAX3950
MAX3920
maxim 1999 circuit diagram
MAX3940
MAX3950
MAX3950EGK
MAX3925
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max3920
Abstract: max3925
Text: 19-1853; Rev 0; 11/00 +3.3V, 10.7Gbps 1:16 Deserializer with LVDS Outputs Features ♦ Supports Serial Data Rates Up to 10.7Gbps ♦ 10Gbps/10.7Gbps Serial to 622Mbps/667Mbps Parallel Conversion ♦ Single +3.3V Supply ♦ 900mW Operating Power ♦ CML Serial Clock and Data Inputs
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MAX3950
10Gbps
16-bit
622Mbps
68-pin
900mW.
10Gbps/10
622Mbps/667Mbps
900mW
max3920
max3925
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Untitled
Abstract: No abstract text available
Text: iPEM 2.4 Gb SDRAM-DDR2 AS4DDR232M72PBG 32Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit FEATURES BENEFITS DDR2 Data rate = 667, 533, 400 Available in Industrial, Enhanced and Military Temp Package: • 255 Plastic Ball Grid Array PBGA , 25 x 32mm
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AS4DDR232M72PBG
32Mx72
AS4DDR232M72PBG
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K8D3216UBC-pi07
Abstract: K5E5658HCM KAD070J00M KBH10PD00M K5D1257ACM-D090000 samsung ddr2 ram MTBF KBB05A500A K801716UBC k5d1g13acm k5a3281ctm
Text: Product Selection Guide Memory and Storage April 2005 MEMORY AND STORAGE SECTION A DRAM DDR2 SDRAM DDR SDRAM SDRAM RDRAM NETWORK DRAM MOBILE SDRAM GRAPHICS DDR SDRAM DRAM ORDERING INFORMATION FLASH NAND, OneNAND, NOR FLASH NAND FLASH ORDERING INFORMATION SRAM
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BR-05-ALL-002
K8D3216UBC-pi07
K5E5658HCM
KAD070J00M
KBH10PD00M
K5D1257ACM-D090000
samsung ddr2 ram MTBF
KBB05A500A
K801716UBC
k5d1g13acm
k5a3281ctm
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DDR2-400
Abstract: DDR2-533 DDR2-667 EBE20RE4ABFA EBE20RE4ABFA-4A-E EBE20RE4ABFA-5C-E EBE20RE4ABFA-6E-E CS 3820
Text: PRELIMINARY DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE20RE4ABFA 256M words x 72 bits, 1 Rank Specifications Features • Density: 2GB • Organization 256M words × 72 bits, 1 rank • Mounting 18 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory
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EBE20RE4ABFA
240-pin
667Mbps/533Mbps/400Mbps
cycles/64ms
M01E0107
E0873E30
DDR2-400
DDR2-533
DDR2-667
EBE20RE4ABFA
EBE20RE4ABFA-4A-E
EBE20RE4ABFA-5C-E
EBE20RE4ABFA-6E-E
CS 3820
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EBE10AD4AGFA-6E-E
Abstract: DDR2-400 DDR2-533 DDR2-667 EBE10AD4AGFA EBE10AD4AGFA-4A-E EBE10AD4AGFA-5C-E E0865E11
Text: PRELIMINARY DATA SHEET 1GB Registered DDR2 SDRAM DIMM EBE10AD4AGFA 128M words x 72 bits, 1 Rank Specifications Features • Density: 1GB • Organization 128M words × 72 bits, 1 rank • Mounting 18 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory
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EBE10AD4AGFA
240-pin
667Mbps/533Mbps/400Mbps
cycles/64ms
M01E0107
E0865E11
EBE10AD4AGFA-6E-E
DDR2-400
DDR2-533
DDR2-667
EBE10AD4AGFA
EBE10AD4AGFA-4A-E
EBE10AD4AGFA-5C-E
E0865E11
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7809 voltage regulator datasheet
Abstract: 7809 voltage regulator voltage regulator 7809 INL03991-02 7809 data sheet national semiconductor embedded system projects pdf free download toshiba web cam TB62705 ST 7809 voltage regulator excalibur Board
Text: & News Views Second Quarter 2001 Newsletter for Altera Customers Altera Provides the Complete I/O Solution with the New APEX II Device Family Altera introduces the APEXTM II device family— flexible, high-performance, high-density programmable logic devices PLDs that deliver
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624-megabit
7809 voltage regulator datasheet
7809 voltage regulator
voltage regulator 7809
INL03991-02
7809 data sheet national semiconductor
embedded system projects pdf free download
toshiba web cam
TB62705
ST 7809 voltage regulator
excalibur Board
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY INFORMATION L9D222G72BG3 2.2 Gb, DDR2, 32 M x 72 Integrated Module IMOD Benefits FEATURES DDR2 SDRAM Data Rate = 800,667,533 and 400Mbps Available in INDUSTRIAL, EXTENDED and MIL-TEMP Package: 16mm x 22mm – 208PBGA, 1.00mm pitch Differential Data Strobe (DQS, DQSx\) per byte
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L9D222G72BG3
400Mbps
208PBGA,
LDS-L9D222G72BG3-B
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SGMII PCIE bridge
Abstract: Scatter-Gather direct memory access SG-DMA TN1084 lvds serdes project wishbone rev. b
Text: f u l l y t e s t e d a n d i n t e r o p e r a b l e Lattice PCIe Solutions Ready-to-Use PCIe Portfolio Lattice provides designers with low cost, low power, programmable solutions that are ready-to-use right out of the box. A suite of tested and interoperable solutions is available for PCI Express,
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Interope/10b
1-800-LATTICE
LatticeMico32,
I0195C
SGMII PCIE bridge
Scatter-Gather direct memory access SG-DMA
TN1084
lvds serdes project
wishbone rev. b
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Untitled
Abstract: No abstract text available
Text: i PEM 2.1 G b SDRAM-DDR2 Gb Austin Semiconductor, Inc. AS4DDR232M64PBG 32Mx64 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit BENEFITS FEATURES DDR2 Data rate = 667, 533, 400 Available in Industrial, Enhanced and Extended Temp
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AS4DDR232M64PBG
32Mx64
AS4DDR232M64PBG
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DDR PHY ASIC
Abstract: ddr ram memory ic CP-01024-1 FLEX10K DDR2-800
Text: DesignCon 2007 Calibration Techniques for HighBandwidth Source-Synchronous Interfaces Manoj Roge, Altera Corporation Andy Bellis, Altera Corporation Phil Clarke, Altera Corporation Joseph Huang, Altera Corporation Mike Chu, Altera Corporation Yan Chong, Altera Corporation
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CP-01024-1
DDR PHY ASIC
ddr ram memory ic
FLEX10K
DDR2-800
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Untitled
Abstract: No abstract text available
Text: K4C89093AF Target 288Mb Network-DRAM-II Specification Version 0.2 - 1 - REV. 0.2 Aug. 2003 K4C89093AF Target Revision History Version 0.0 Nov. 2002 - First Release Version 0.1 (Apr. 2003) - Added 800Mbps(400Mhz) product - Changed operating temperature from Ta to Tc.
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K4C89093AF
288Mb
800Mbps
400Mhz)
K4C89363AF-GC
8K/32ms
667Mbps/pin
333MHz,
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qfn-44 PACKAGE footprint
Abstract: No abstract text available
Text: KIT ATION EVALU E L B AVAILA 19-2215; Rev 6; 10/07 +3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1 Serializer with Clock Synthesis The MAX3892 serializer is ideal for converting 4-bitwide, 622Mbps parallel data to 2.5Gbps serial data in DWDM and SONET/SDH applications. A 4 ✕ 4-bit FIFO
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MAX3892
622Mbps
622MHz,
MAX3892EVKIT
MAX3892
mvp/id/3215/t/al
15-Nov-2010
qfn-44 PACKAGE footprint
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Untitled
Abstract: No abstract text available
Text: K4C89183AF 288Mb Network-DRAM-II Specification Version 0.11 - 1 - REV. 0.11 Apr. 2003 K4C89183AF Revision History Version 0.0 Oct. 2002 - First Release Version 0.01 (Nov. 2002) - Changed die revision from D-die to F-die - Corrected typo - Corrected DQS to DS and QS(DQS -> DS and QS) in AC timing table and timing diagram.
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K4C89183AF
288Mb
800Mbps
400Mhz)
8K/32ms
800Mbps/pin
400MHz,
667Mbps/pin
333MHz,
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EDE5108AJSE-6E-E
Abstract: EDE5104AJSE EDE5104AJSE-8E-E EDE5108AJSE EDE5116AJSE ELPIDA DDR2 SDRAM
Text: PRELIMINARY DATA SHEET 512M bits DDR2 SDRAM EDE5104AJSE 128M words x 4 bits EDE5108AJSE (64M words × 8 bits) EDE5116AJSE (32M words × 16 bits) Specifications Features • Density: 512M bits • Organization 32M words × 4 bits × 4 banks (EDE5104AJSE)
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EDE5104AJSE
EDE5108AJSE
EDE5116AJSE
EDE5104AJSE)
EDE5108AJSE)
EDE5116AJSE)
60-ball
EDE5104/08AJSE)
84-ball
EDE5108AJSE-6E-E
EDE5104AJSE
EDE5104AJSE-8E-E
EDE5108AJSE
EDE5116AJSE
ELPIDA DDR2 SDRAM
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DDR2-667
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 4GB Fully Buffered DIMM EBE41FE4ACFT Specifications Features • Density: 4GB • Organization ⎯ 512M words x 72 bits, 2 ranks • Mounting 36 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package ⎯ 240-pin fully buffered, socket type dual in line
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EBE41FE4ACFT
240-pin
655-ball
75V/-0
667Mbps
M01E0107
E1091E20
DDR2-667
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DDR2-667
Abstract: EDE5108AJSE-6E-E E1088E20
Text: PRELIMINARY DATA SHEET 1GB Fully Buffered DIMM EBE11FD8AJFT Specifications Features • Density: 1GB • Organization 128M words x 72 bits, 2 ranks • Mounting 18 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package 240-pin fully buffered, socket type dual in line
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EBE11FD8AJFT
240-pin
655-ball
75V/-0
667Mbps
M01E0107
E1088E20
DDR2-667
EDE5108AJSE-6E-E
E1088E20
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DDR2-667
Abstract: DDR2-800 EDE5108AJBG-8E-E EBE11UD8AJUA-6E-E SSTL-18
Text: PRELIMINARY DATA SHEET 1GB DDR2 SDRAM SO-DIMM EBE11UD8AJUA 128M words x 64 bits, 2 Ranks Specifications Features • Density: 1GB • Organization ⎯ 128M words × 64 bits, 2 ranks • Mounting 16 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 200-pin socket type small outline dual in
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EBE11UD8AJUA
200-pin
800Mbps/667Mbps
M01E0107
E1083E10
DDR2-667
DDR2-800
EDE5108AJBG-8E-E
EBE11UD8AJUA-6E-E
SSTL-18
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RDRAM CONCURRENT
Abstract: samsung concurrent rdram KM49RC2H-A66 km49rc2h-a60 km-48 concurrent RDRAM 72 KM49RC2H
Text: Preliminary Concurrent RDRAM KM48 9 RC2H 16/18Mbit R D R A M 2M X 8/9bit Concurrent RAMBUS DRAM Revision 0.7 February 1998 Rev. 0.7 (Feb. 1998) Preliminary Concurrent RDRAM KM48(9)RC2H Revision History Revision 0.5 (October 1997) - Preliminary • . Changed Peak TrasferRate from 700Mbps to 667Mbps. (page 1)
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16/18Mbit
700Mbps
667Mbps.
SHP-32
RDRAM CONCURRENT
samsung concurrent rdram
KM49RC2H-A66
km49rc2h-a60
km-48
concurrent RDRAM 72
KM49RC2H
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