64PLN Search Results

Contextual Info: * PRELIM INARY SY69167 SY69267 ULTRA-HIGH-SPEED 64-W O RD x 18-BIT FIFO SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION System clock speeds to 200MHz S y n e rg y ’s S Y 6 9 1 6 7 a nd S Y 6 9 2 6 7 are u ltra -h ig h ­ speed 6 4 -w o rd -b y -1 8 -b it F irst-In /F irst-O u t FIFO static

Contextual Info: PACE1753 SINGLE CHIP, 40MHz CMOS MMU/COMBO 4 FEATURES Implements the MIL-STD-1750A Instruction Set Architecture for Memory Management and Protection of up to 1 Megaword. A ll mapping memory 10,240 bfts for both the MMU and BPU functions are Included on the chip.

Contextual Info: |9 | N a HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM w Éy IDT7005S/L Integrated Device Technology, Inc. • Interrupt Flag • On-chlp port arbitration logic • Full on-chip hardware support of semaphore signaling between ports • Fully asynchronous operation from either port

Contextual Info: IM P O R T A N T N O TIC E All new designs should use XC3000A or XC3100A. Information on XC3000 and XC3100 is presented here as reference for existing designs. £ x il in x XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families Product Description

8097BH

Abstract: 809XBH 8095BH 4a5l1 LA 8797BH 8795BH
Contextual Info: ¡ n f j P B J H L D fiflD B s m iR V 809XBH/839XBH/879XBH COMMERCIAL/EXPRESS HMOS MICROCONTROLLER • 879XBH: an 809XBH with 8 Kbytes of On-Chip EPROM ■ 839XBH: an 809XBH with 8 Kbytes of On-Chip ROM 232 Byte Register File High Speed I/O Subsystem Register-to-Register Architecture

adsp1016a

Abstract: ADSP-1016ATE ADSP-1016A ADSP1016ASE MPY016HJ1 d64a sp1016 MPY016HJ ADSP-1016ASE ADSP-1016ATE/883B
Contextual Info: □ ANALOG DEVICES 16 x 16-Bit CMOS Multiplier ADSP-1016A FEATURES 16 x 16-Bit Parallel Multiplication 70ns Multiplication Time 225mW Power Dissipation with TTL-Compatible CMOS Technology Twos-Complement, Unsigned-Magnitude and MixedMode Data Formats Available in Hermetically Sealed 64-Pin DIP,

2SH24

Abstract: stc-1000 D7519 NEC FIP 7519 v D-7519 STC1000
Contextual Info: i ií r / V NEC Electronics Inc. HPD7519/19H 4-BIT, SINGLE-CHIP c m o s m ic r o c o m p u t e r s W ITH FIP CONTROLLER/DRIVER Description Features The /¿PD7519, 7519H, 75CG19, and 75CG19H are CMOS 4-bit, single-chip m icro com pu ters w ith the /¿PD7500

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT f ¿/PD78011BY, 78012BY, 78013Y, 78014Y 8-BIT SINGLE-CHIP MICROCOMPUTERS DESCRIPTION The ¿¡PD78011BY, ¿¡PD78012BY, ¿¡PD78013Y and ¿¡PD78014Y, ¿¡PD78014Y sub-series products o f the 78K/0 series, su pp ort the l2C bus control fu nctio n. These com puters incorporate various peripherals such as the serial interface

P12-I

Abstract: BTM200 PO3C PD75104G-1B pd75108
Contextual Info: 6427525 N EC ELECTRONI CS INC N E C ELECTRONICS INC \ r fr C .^ 7 . . NEC Electronics Inc. Description - The uPD75104, ¿/PD75106, and //PD75108 are highperformance slngle-chip CMOS microcomputers that incorporate a CPU, ROM, RAM, I/O ports, vector interrupt functions, serial interface, and timer/event

Contextual Info: SA MS UNG E L E C T R O N I C S INC 42E D Bi 0011103 1 BSflGK PRELIMINARY KM23C16000FP CMOS MASK ROM 16M-Bit 2M X8/1M X16 CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Swltchable organization 2,097,152 x 8 (byte mode) 1,048,576 x 16 (word mode) • Fast access time: 150ns (max.)

Contextual Info: 3bE D m 7 Ö 1 1 D 7 3 OOlSSlfc. □ B B R K U R65012 R O C K W E L L / D I G I T A L COMM R6500 M icrocom puter System R65012 One-Chip Microprocessor SECTION 1 INTRODUCTION SUMMARY FEATURES The Rockwell R65012 is a complete, high performance 8bit NMOS-3 microcomputer on a single chip and is com­

Contextual Info: R8071 R8071 ISDN/DMI Link Layer Controller * Rockwell APPLICATIONS DMI ISDN HOST INTERFACE PBX TRUNKSIDE ADAPTERS PRIMARY RATE INTERFACES BASIC RATE D-CHANNEL CONTROLLER INTRODUCTION FEATURES The Rockwell R8071 ISDN/DMI Link Layer Controller device mul­ tiplexes/demultiplexes up to 32 high speed data channels to sup­

Contextual Info: SYNERGY SEMICONDUCTOR S7E » • System clock speeds to 250MHz ■ User-selectable bandwidth — one read or write operation each clock cycle ■ Selectabe OVERFLOW and UNDERFLOW Interrupts ■ EMPTY, FULL and HALF-FULL status flags ■ Simple Initialization via RESET Input

UPD7831x

Abstract: PD78310 D78P312A uPD78P312ACW uPD78P312AR P0407 pd78312 uPD7831xA D78P312
Contextual Info: AflTf* MlàV A/PD7831 X A Fam ily 16-/8-Bit, Single-Chip, High-Performance Real-Time-Control Microcom puters Description The fiPD7831XA microcomputers are designed for use in process control. They perform all the usual process control functions and are particularly well-suited for

p34ad

Abstract: 809XBH ecu eprom 8096BH MCS-96
Contextual Info: i n t ç l e P K iO 809XBH/839XBH/879XBH COMMERCIAL/EXPRESS HMOS MICROCONTROLLER 879XBH: an 809XBH with 8 Kbytes of On-Chip EPROM I 839XBH: an 809XBH with 8 Kbytes of On-Chip ROM 232 Byte Register File High Speed I/O Subsystem Register-to-Register Architecture

Contextual Info: <$2JLG E P r e l im in a r y P r o d u c t S p e c if ic a t io n Z86127 LOW-COST DIGITAL T e le visio n C o n t r o l l e r LDTC FEATURES 8-bit CMOS microcontroller for consumer television applications. • Clock speed up to 4 MHz ■ On-chip oscillator that accepts a crystal, ceramic

MB89372A

Abstract: CRC16-0 MB89259A ujt timer CIRCUIT
Contextual Info: 1. Introduction 1.1. 1.2. 1.3. 1.4. Introduction. 1-3 Features. 1-4 Block Diagram. 1-6

uPB6101C

Abstract: NEC C51A N021C F010 nec inverter schematic nec lot code format T-42-11-05
Contextual Info: N É C ELECTRONICS INC 7H D e | LiMH752S DD0Û110 1 NEC N E C Electronics Inc. c T-.42-11-05 //PB 6100 TTL-2 SERIES BIPOLAR TTL GATE ARRAYS March 1985 Revision 1 Description The //PB6100 series features three high-speed, lowpower, TTL-compatible gate arrays using advanced

L481

Abstract: PP641
Contextual Info: IDT7130SA/LA IDT7140SA/LA CMOS DUAL-PORT RAM 8K 1Kx 8-BIT In te g ra te d D e v ic e T e c h n o lo g y , Inc. FEATURES DESCRIPTION • High-speed access — Military: 2 5 /3 5 /5 5 /1 00ns (m ax.) — Commercial: 2 5 /3 5 /5 5 /1 00ns (max.) — Commercial: 20ns 7 1 3 0 inPLCC and T Q F P

MPY12HJ

Abstract: MPY-12HJ LMU12 CMOS 4507
Contextual Info: LOGIC DEVICES 5bE INC D • S5bSTGS 12 x 12-bit Parallel Multiplier □ Low Power CMOS Technology □ Replaces TRW MPY12HJ □ Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs The LMU12 produces the 24-bit product of two 12-bit numbers. Data

D78P014

Abstract: PD78P014 P25Y 14gc D78P0 d78p014 nec
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUII _ ¿ ¿ P P 7 8 P 0 1 4 8-BIT SINGLE-CHIP M ICROCONTROLLER DESCRIPTION T h e ;iP D 7 8 P 0 1 4 is a m em b e r of the pP D 78014 su b se rie s of 78K/0 se rie s products. It u se s a one-tim e-program m able

1243 MK

Abstract: upd760
Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUII 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION The /¿PD780001 is a product of the 78K/0 Series of m icrocontrollers, and features internal 8-bit resolution A/D converters, tim ers, serial interface units, interrupt controllers, and many other incorporated peripheral hardware.

P1750A performance

Abstract: 5962-8766501TX P1750A20PGM P1750A-20PGMB
Contextual Info: PACE1750A SINGLE CHIP, 40MHz, CMOS 16-BIT PROCESSOR - • : — ; : FEATURES ■ Implements the MIL-STD-1750A Instruction Set Architecture ■ 20,30 and 40 MHz operation over the Military Temperature Range ■ Single Chip PACE Technology CMOS 16-Bit Processor with 32 and 48-Bit Floating Point

UPD482445

Abstract: PD482444
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT / /;PD482444, 482445 4M-Bit Dual Port Graphics Buffer 256K-WORD BY 16-BIT D e s c rip tio n The ¿¿PD482444 and //PD482445 have a random access port and a serial access port. The random access port has a 4M -bit 262, 144 words x 16 bits memory cell array structure. The serial access port can perform clock