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    64KX18 Search Results

    64KX18 Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    CY7C4285-15ASC Rochester Electronics LLC FIFO, 64KX18, 10ns, Synchronous, CMOS, PQFP64, 10 X 10 MM, TQFP-64 Visit Rochester Electronics LLC Buy

    64KX18 Datasheets Context Search

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    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V
    Text: fax id: 5422 CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V PRELIMINARY 8K/16K/32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to


    Original     		PDF CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 8K/16K/32K/64Kx18 CY7C4255/65/75/85V CY7C42X5V CY7C4255V CY7C4265V CY7C4275V CY7C4285V

    IBM0418A11NLAA

    Abstract: IBM0436A11NLAA
    Text: . Preliminary IBM0436A11NLAA IBM0418A11NLAA 32Kx36 & 64Kx18 SRAM Features • 32Kx36 or 64Kx18 organizations • Registered Outputs • 0.25 Micron CMOS technology • 30 Ohm Drivers • Synchronous Pipeline Mode of Operation with Self-Timed Late Write • Common I/O


    Original     		PDF IBM0436A11NLAA IBM0418A11NLAA 32Kx36 64Kx18 32Kx36 nrrL3325 IBM0418A11NLAA IBM0436A11NLAA

    CY7C4275V

    Abstract: CY7C4285V CY7C42X5V
    Text: fax id: 5422 CY7C4275V CY7C4285V PRELIMINARY 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4275V/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to


    Original     		PDF CY7C4275V CY7C4285V 32K/64Kx18 CY7C4275V/85V CY7C42X5V CY7C4275V CY7C4285V

    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC
    Text: CY7C4255V, CY7C4265V CY7C4275V, CY7C4285V 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description • 3.3V operation for low power consumption and easy integration into low voltage systems ■ High speed, low power, first-in first-out FIFO memories


    Original     		PDF CY7C4255V, CY7C4265V CY7C4275V, CY7C4285V 32K/64Kx18 CY7C4255V) CY7C4265V) CY7C4275V) CY7C4255/65/75/85V CY7C42X5V CY7C4255V CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC

    Untitled

    Abstract: No abstract text available
    Text: CY7C4275 CY7C428532K/64Kx18 Deep Sync FIFOs 1CY7C4285 CY7C4275 CY7C4285 32K/64Kx18 Deep Sync FIFOs Features Functional Description • High-speed, low-power, first-in first-out FIFO memories • 32K x 18 (CY7C4275) • 64K x 18 (CY7C4285) • 0.5 micron CMOS for optimum speed/power


    Original     		PDF CY7C4275 CY7C428532K/64Kx18 1CY7C4285 CY7C4285 32K/64Kx18 CY7C4275) CY7C4285) 100-MHz 10-ns

    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC
    Text: CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to


    Original     		PDF CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 32K/64Kx18 CY7C4255/65/75/85V CY7C42X5V CY7C4255V CY7C4265V CY7C4275V CY7C4285V CY7C42X5V-ASC

    CY7C4275

    Abstract: CY7C4285 CY7C42X5
    Text: 285 CY7C4275 CY7C4285 32K/64Kx18 Deep Sync FIFOs Features Functional Description • High-speed, low-power, first-in first-out FIFO memories • 32K x 18 (CY7C4275) • 64K x 18 (CY7C4285) • 0.5 micron CMOS for optimum speed/power • High-speed 100-MHz operation (10-ns read/write cycle


    Original     		PDF CY7C4275 CY7C4285 32K/64Kx18 CY7C4275) CY7C4285) 100-MHz 10-ns CY7C4275, CY7C4275 CY7C4285 CY7C42X5

    16Kx1

    Abstract: sRAM CY7C4265V CY7C4285V CY7C42X5V CY7C42X5V-ASC CY7C4255V CY7C4275V o-ring D015
    Text: CY7C4255V, CY7C4265V CY7C4275V, CY7C4285V 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description • 3.3V operation for low power consumption and easy integration into low voltage systems ■ High speed, low power, first-in first-out FIFO memories


    Original     		PDF CY7C4255V, CY7C4265V CY7C4275V, CY7C4285V 32K/64Kx18 CY7C4255V) CY7C4265V) CY7C4275V) CY7C4285V) 16Kx1 sRAM CY7C4265V CY7C4285V CY7C42X5V CY7C42X5V-ASC CY7C4255V CY7C4275V o-ring D015

    IBM0418A1ANLAA

    Abstract: IBM0436A1ANLAA
    Text: . IBM0418A1ANLAA IBM0436A1ANLAA 32Kx36 & 64Kx18 SRAM Preliminary Features • 32K x 36 or 64K x 18 organizations • Common I/O • 0.25µ CMOS technology • 30Ω Drivers • Synchronous Register-Latch Mode of Operation with Self-Timed Late Write • Asynchronous Output Enable and Power Down


    Original     		PDF IBM0418A1ANLAA IBM0436A1ANLAA 32Kx36 64Kx18 nrlL3325 IBM0418A1ANLAA IBM0436A1ANLAA

    TS 4142

    Abstract: metal case REGULATOR IC 7812 pin diagram CY7C4275 CY7C4285 CY7C42X5 rs447
    Text: fax id: 5416 CY7C4275 CY7C4285 PRELIMINARY 32K/64Kx18 Deep Sync FIFOs Features Functional Description The CY7C4275/85 are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to the


    Original     		PDF CY7C4275 CY7C4285 32K/64Kx18 CY7C4275/85 CY7C42X5 CY7C4275) CY7C4285) TS 4142 metal case REGULATOR IC 7812 pin diagram CY7C4275 CY7C4285 rs447

    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC QO-17
    Text: CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V V CYPRESS 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfac­ es. All are 18 bits wide and are pin/functionally compatible to


    OCR Scan     		PDF CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 32K/64Kx CY7C4255V) CY7C4265V) CY7C4275V) CY7C4285V) 100-MHz 10-ns CY7C4255V CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC QO-17

    metal case REGULATOR IC 7812 pin diagram

    Abstract: CY7C4275 CY7C4285 CY7C42X5
    Text: fax id: 5416 ^;aaazgg st CY7C4275 CY7C4285 PRELIMINARY ; U I F lm c b ti 32K/64Kx18 1 Meg Deep Sync FIFOs Functional Description Features H ig h-speed , low -pow er, first-in first-o u t F IF O m em o ries 32K x 18 (C Y 7 C 42 75 ) 64K x 18 (C Y 7 C 42 85 )


    OCR Scan     		PDF CY7C4275 CY7C4285 32K/64Kx18 CY7C4275) CY7C4285) 100-MHz metal case REGULATOR IC 7812 pin diagram CY7C4285 CY7C42X5

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5416 CY7C4275 CY7C4285 32K/64Kx18 Deep Sync II FIFOs Featu res High-speed, low-power, first-in first-out FIFO memories 32K x 18 (CY7C4275) 64K x 18 (CY7C4285) 0.5 micron CMOS for optimum speed/power High-speed 100-MHz operation (10 ns read/write cycle


    OCR Scan     		PDF CY7C4275 CY7C4285 32K/64Kx18 CY7C4275) CY7C4285) 100-MHz 68-pin 64-pin CY7C4275/85are

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY KM718B86 64Kx18 Synchronous SRAM 64K X 18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. The KM718B86 is a 1,179,648 bit Synchronous Static • On-Chip Address Counter. Random Access Memory designed to support 66MHz of


    OCR Scan     		PDF KM718B86 64Kx18 18-Bit KM718B86 66MHz ofKM718B86

    EDI20180C

    Abstract: EDI20181C EDI20182C EDI20183C EDI20184C EDI20185C
    Text: m o EDI20180C-EDI20185C \ E le c tro n ic D e sig n s In c . 1 High Performance Synchronous SRAM 64Kx18 Monolithic High Speed Synchronous Static RAM Features The EDI20180C is a high performance, 1 megabit Synchronous Static RAM organized as 64Kx18, avail­


    OCR Scan     		PDF EDI20180C-EDI20185C 64Kx18 EDI20180C 64Kx18, 65Mhz A0-A15 DQ0-DQ17 EDI20181C EDI20182C EDI20183C EDI20184C EDI20185C

    Untitled

    Abstract: No abstract text available
    Text: ^EDI EDI20180C-EDI20185C Electronic Dmlgnt Inc. High Performance Synchronous SRAM ]F MMDOi 64Kx18 Monolithic High Speed Synchronous Static RAM Features The EDI20180C is a high performance, 1 megabit Synchronous Static RAM organized as 64Kx18, avail­ able in six versions.


    OCR Scan     		PDF EDI20180C-EDI20185C 64Kx18 EDI20180C 64Kx18, 65Mhz EDI20181C A0-A15 DQ0-DQ17

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY KM718BV87AT 64Kx18 Synchronous SRAM 64K X 18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION. • Synchronous Operation. • On-Chip Address Counter. • W rite Self-Timed Cycle. •On- Chip Address and Control Registers ■ Single 3.3V±5% Power Supply.


    OCR Scan     		PDF KM718BV87AT 64Kx18 18-Bit 100-Pin KM718BV87AT

    Untitled

    Abstract: No abstract text available
    Text: 64Kx18 Synchronous SRAM KM718BV90 64K X 18-Bit Syncronous Burst SRAM FEA TU R ES G E N ER A L DESCRIPTIO N • Synchronous Operation. • On-Chip Address Counter. The KM718BV90 is a 1,179,648 bit Synchronous Static • • • • • • Intel secondary caches. It is organized as 65,536 words


    OCR Scan     		PDF KM718BV90 64Kx18 18-Bit KM718BV90 66MHz 7U414E 0G217D2

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY 64Kx18 Synchronous SRAM KM718B86 64K X 18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. The KM718B86 is a 1,179,648 bit Synchronous Static • On-Chip Address Counter. Random Access Memory designed to support 66MHz of


    OCR Scan     		PDF KM718B86 64Kx18 18-Bit 52-Pin KM718B86 66MHz

    Untitled

    Abstract: No abstract text available
    Text: KM718B90 64Kx18 Synchronous SRAM 64K X 18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. The KM718B90 is a 1,179,648 bit Synchronous Static • On-Chip Address Counter. Random Access Memory designed to support 66MHz of • Self-Timed Write Cycle.


    OCR Scan     		PDF KM718B90 64Kx18 18-Bit 52-Pin KM718B90 66MHz

    KM718V687-8

    Abstract: No abstract text available
    Text: PRELIMINARY KM718V687 64Kx18 Synchronous SRAM 64Kx18 Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION. • Synchronous Operation. • On-Chip Address Counter. • Write Self-Timed Cycle. • On- Chip Address and Control Registers. • Single 3.3V± 5% Power Supply.


    OCR Scan     		PDF KM718V687 64Kx18 100-Pin KM718V687 7TL414E KM718V687-8

    KM718B90

    Abstract: 52-PLCC-SQ
    Text: KM718B90 64Kx18 Synchronous SRAM 64K X 18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION • • • • • The KM718B90 is a 1,179,648 bit Synchronous Static Random Access Memory designed to support 66MHz of Intel secondary caches. It is organized as 65,536 words


    OCR Scan     		PDF KM718B90 64Kx18 18-Bit AI55C 52-Pin KM718B90 66MHz 52-PLCC-SQ

    KM718BV87-12

    Abstract: No abstract text available
    Text: PRELIMINARY 64Kx18 Synchronous SRAM KM718BV87 64K X 18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. • On-Chip Address Counter. The KM718BV87 is a 1,179,648 bit Synchronous Static Random Access Memory designed to support zero wait


    OCR Scan     		PDF KM718BV87 64Kx18 18-Bit 52-Pin KM718BV87 KM718BV87-12

    C1737

    Abstract: KM718B90 KM718B90-10 KM718B90-9
    Text: 64Kx18 Synchronous SRAM KM718B90 64K X 18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. The KM718B90 is a 1,179,648 bit Synchronous Static • On-Chip Address Counter. Random Access Memory designed to support 66MHz of Intel secondary caches. It is organized as 65,536 words


    OCR Scan     		PDF KM718B90 64Kx18 18-Bit 52-Pin KM718B90 66MHz ItKx18 C1737 KM718B90-10 KM718B90-9