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    JEDEC MO-187 CA

    Abstract: JEDEC MO-187 FIN1027
    Contextual Info: Revised November 2002 FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 FIN1028, 600Mbs JEDEC MO-187 CA JEDEC MO-187 PDF

    FI1027M

    Abstract: M08A
    Contextual Info: Preliminary Revised December 2000 FI1027 3.3V LVDS Dual High Speed Differential Driver Preliminary General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FI1027 600Mbs FI1027 FI1028, TIA/EIA-644 FI1027M M08A PDF

    Contextual Info: FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver Description Features ̇ ̇ ̇ ̇ ̇ ̇ ̇ ̇ This dual driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal


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    FIN1027 FIN1027A 350mV, 600Mbs FIN1027A FIN1028, PDF

    FIN1027

    Abstract: FIN1027M FIN1028 M08A
    Contextual Info: Preliminary Revised February 2001 FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver Preliminary General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 600Mbs FIN1027 FIN1028, TIA/EIA-644 FIN1027M FIN1028 M08A PDF

    JEDEC MO-187

    Abstract: FIN1017 FIN1017K8X FIN1017M FIN1017MX FIN1018 M08A MO-187
    Contextual Info: Revised April 2002 FIN1017 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1017 600Mbs FIN1017 FIN1018, TIA/EIA-644 JEDEC MO-187 FIN1017K8X FIN1017M FIN1017MX FIN1018 M08A MO-187 PDF

    JEDEC MO-187

    Abstract: FIN1027AMX FIN1027K8X FIN1027M FIN1027MX FIN1028 FIN1027 FIN1027A FIN1027AM JEDEC MS-012
    Contextual Info: FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver Description Features ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ This dual driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal


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    FIN1027 FIN1027A 350mV, 600Mbs FIN1028, FIN1027A JEDEC MO-187 FIN1027AMX FIN1027K8X FIN1027M FIN1027MX FIN1028 FIN1027AM JEDEC MS-012 PDF

    FI1017K8X

    Abstract: FI1017M FI1017MX M08A
    Contextual Info: Preliminary Revised December 2000 FI1017 3.3V LVDS Single High Speed Differential Driver Preliminary General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FI1017 600Mbs FI1017 FI1018, TIA/EIA-644 FI1017K8X FI1017M FI1017MX M08A PDF

    Contextual Info: FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver Features Description ̇ ̇ ̇ ̇ ̇ ̇ ̇ ̇ ̇ This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal


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    FIN1017 350mV, 600Mbs FIN1017 FIN1018, PDF

    MS-012 soic 16

    Abstract: FIN1027
    Contextual Info: Revised May 2003 FIN1027 FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 FIN1027A FIN1027 FIN1028, 600Mbs MS-012 soic 16 PDF

    Contextual Info: Preliminary Revised February 2001 FIN1017 3.3V LVDS 1-Bit High Speed Differential Driver Preliminary General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1017 600Mbs FIN1017 FIN1018, TIA/EIA-644 PDF

    FIN1027

    Contextual Info: Revised April 2003 FIN1027 FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 FIN1027A FIN1027 FIN1028, 600Mbs PDF

    Contextual Info: Revised December 2001 FIN1017 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1017 FIN1018, 600Mbs PDF

    Contextual Info: Revised February 2002 FIN1017 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1017 FIN1018, 600Mbs PDF

    FIN1027

    Contextual Info: Revised January 2003 FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 FIN1028, 600Mbs PDF

    JEDEC MO-187

    Abstract: MO-187 FIN1017 FIN1017K8X FIN1017MX FIN1018 JESD22-A114 JESD22-A115 SOIC127P600X175-8M
    Contextual Info: FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver Features Description ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal


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    FIN1017 350mV, 600Mbs FIN1017 FIN1018, JEDEC MO-187 MO-187 FIN1017K8X FIN1017MX FIN1018 JESD22-A114 JESD22-A115 SOIC127P600X175-8M PDF

    FIN1027

    Abstract: FIN1027A FIN1027AM FIN1027AMX FIN1027K8X FIN1027M FIN1027MPX FIN1027MX FIN1028
    Contextual Info: Revised June 2003 FIN1027 FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 FIN1027A 600Mbs FIN1027 FIN1027A FIN1028, TIA/EIA-644 FIN1027AM FIN1027AMX FIN1027K8X FIN1027M FIN1027MPX FIN1027MX FIN1028 PDF

    FIN1001

    Abstract: FIN1001M5 FIN1001M5X FIN1002 MA05B MO-178
    Contextual Info: Revised January 2002 FIN1001 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1001 600Mbs FIN1001 FIN1002, TIA/EIA-644 FIN1001M5 FIN1001M5X FIN1002 MA05B MO-178 PDF

    Contextual Info: Revised April 2001 FIN1017 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1017 FIN1018, 600Mbs PDF

    Contextual Info: Revised April 2001 FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 FIN1028, 600Mbs PDF

    FIN1027

    Abstract: FIN1027A FIN1027AMX FIN1027K8X FIN1027M FIN1027MX FIN1028 MO-187
    Contextual Info: FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver Description Features ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ This dual driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal


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    FIN1027 FIN1027A 350mV, 600Mbs FIN1028, FIN1027A FIN1027AMX FIN1027K8X FIN1027M FIN1027MX FIN1028 MO-187 PDF

    FIN1001M5

    Abstract: FIN1001 FIN1001M5X FIN1002 MA05B MO-178
    Contextual Info: Revised September 2003 FIN1001 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1001 600Mbs FIN1001 FIN1002, TIA/EIA-644 FIN1001M5 FIN1001M5X FIN1002 MA05B MO-178 PDF

    us8 Package

    Abstract: FIN1017 FIN1017K8X FIN1017M FIN1017MX FIN1018 M08A
    Contextual Info: Revised September 2001 FIN1017 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1017 600Mbs FIN1017 FIN1018, TIA/EIA-644 us8 Package FIN1017K8X FIN1017M FIN1017MX FIN1018 M08A PDF

    FIN1027M

    Abstract: FIN1027 FIN1028 M08A
    Contextual Info: Revised September 2001 FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1027 600Mbs FIN1027 FIN1028, TIA/EIA-644 FIN1027M FIN1028 M08A PDF

    MA05B

    Abstract: FIN1001M5 FIN1001 FIN1001M5X FIN1002 MO-178
    Contextual Info: Revised August 2004 FIN1001 3.3V LVDS 1-Bit High Speed Differential Driver General Description Features This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which


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    FIN1001 600Mbs FIN1001 FIN1002, TIA/EIA-644 MA05B FIN1001M5 FIN1001M5X FIN1002 MO-178 PDF