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    54LS132 Search Results

    54LS132 Result Highlights (4)

    Part ECAD Model Manufacturer Description Download Buy
    SN54LS132J Texas Instruments Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CDIP -55 to 125 Visit Texas Instruments
    SNJ54LS132W Texas Instruments Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CFP -55 to 125 Visit Texas Instruments Buy
    SNJ54LS132J Texas Instruments Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CDIP -55 to 125 Visit Texas Instruments Buy
    SNJ54LS132FK Texas Instruments Quadruple 2-Input Positive-NAND Schmitt Triggers 20-LCCC -55 to 125 Visit Texas Instruments Buy
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    54LS132 Price and Stock

    Texas Instruments SN54LS132J

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    Texas Instruments SNJ54LS132J

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    Texas Instruments 54LS132/BCBJC

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    Quest Components 54LS132/BCBJC 14
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    Raytheon 54LS132W/883B

    54LS132W/883B
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    Quest Components 54LS132W/883B 1
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    Texas Instruments 54LS132

    TI 54LS132
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    ES Components 54LS132 776
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    54LS132 Datasheets (7)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    54LS132 Raytheon Quad 2-lnput Schmitt-Trigger Scan PDF
    54LS132/BCAJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS132DM Fairchild Semiconductor Quad 2-Input Schmitt Trigger NAND Gate Scan PDF
    54LS132F Signetics Quad 2-Input NAND Schmitt Trigger / 13 Input NAND Gate Scan PDF
    54LS132FM Fairchild Semiconductor Quad 2-Input Schmitt Trigger NAND Gate Scan PDF
    54LS132M/B2AJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS132W Signetics Quad 2-Input NAND Schmitt Trigger / 13 Input NAND Gate Scan PDF

    54LS132 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    qml-38535

    Abstract: 54LS132 CDFP2-F14 GDFP1-F14
    Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED D Device 01 inactive for new design. Add vendor, FSCM 04713. 85-09-17 N. A. Hauck E Remove vendor FSCM 18324. Delete minimum limits from propagation delay times. Hysteresis shall be guaranteed if not tested to specified limits. Editorial


    Original     		PDF

    ay-5-1012

    Abstract: ali m 3329 PROCESSOR ALI 3329 ali 3329 b ali 3329 SN74188 sn74s188 str 52100 SN7452 replacement of bel 187 transistor
    Text: GENERAL INFORMATION lie of Contents • Alphanumeric Index • Selection Guides • Glossary INTERCHANGEABiliTY GUIDE MOS MEMORIES TTL MEMORIES ECl MEMORIES MICROPROCESSOR SUMMARY 38510/MACH IV PROCUREMENT SPECIFICATION JAN Mll-M-38510 INTEGRATED CIRCUITS


    Original     		PDF 38510/MACH Mll-M-38510 Z501300 Z501200 Z501201 Z012510 ZOl1510 ay-5-1012 ali m 3329 PROCESSOR ALI 3329 ali 3329 b ali 3329 SN74188 sn74s188 str 52100 SN7452 replacement of bel 187 transistor

    Untitled

    Abstract: No abstract text available
    Text: M M O T O R O L A M ilita ry 54L S 1 3 2 Quad 2-In p u t Schm itt-TVigger P ositive NAND G a te MPO mini ELECTRICALLY TESTED PER: MIL-M-38510/31303 The 54LS132 contains four 2-input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They


    OCR Scan     		PDF MIL-M-38510/31303 54LS132

    54LS132

    Abstract: 1N3064 1-INPUT NAND SCHMITT TRIGGER 54LS132 MOTOROLA
    Text: M Military 54LS132 M O TO RO LA Quad 2-Input Schmitt-TVigger Positive NAND Gate MPO ELE C TR IC A LLY TESTED PER: M IL-M -38510/31303 H U M The 54LS132 contains four 2-input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They


    OCR Scan     		PDF MIL-M-38510/31303 54LS132 1N3064 1-INPUT NAND SCHMITT TRIGGER 54LS132 MOTOROLA

    Untitled

    Abstract: No abstract text available
    Text: M MOTOROLA M ilita ry 54L S 132 Quad 2-Inp ut Schm itt-TVigger P ositive NAND G ate MPO ELECTRICALLY TESTED PER: MIL-M-38510/31303 /////// The 54LS132 contains four 2-inpul NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They


    OCR Scan     		PDF MIL-M-38510/31303 54LS132

    Untitled

    Abstract: No abstract text available
    Text: M MOTOROLA Military 54LS132 Quad 2-Input Schm itt-T rigger Positive NAND Gate ELECTRICALLY TESTED PER: MIL-M-38510/31303 T h e 5 4 L S 1 3 2 c o n t a in s f o u r 2 - in p u t N A N D G a t e s w h ic h a c c e p t s t a n ­ d a rd T T L in p u t s ig n a ls a n d p r o v id e s t a n d a rd T T L o u t p u t le v e ls . T h e y


    OCR Scan     		PDF MIL-M-38510/31303

    74s188 programming

    Abstract: 74S471 N82S06 74S470 dip18 package str 52100 MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR 74S472 PROM PROGRAMMING 8080a 74S287 programming instructions
    Text: The E ngineering Staff of TEXAS INSTRUMENTS INCORPORATED Semiconductor Memory Data Book y for \ T exas In Design Engineers s t r u m e n t s >le of Contents • Alphanumeric Index • GENERAL INFORMATION Selection Guides • Glossary INTERCHANGEABILITY GUIDE


    OCR Scan     		PDF 38510/MACH MIL-M-38510 74s188 programming 74S471 N82S06 74S470 dip18 package str 52100 MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR 74S472 PROM PROGRAMMING 8080a 74S287 programming instructions

    74LS115

    Abstract: 74LS273 74LS189 equivalent 74LS00 QUAD 2-INPUT NAND GATE 74LS265 fan-in and fan out of 7486 74LS93A 74LS181 74LS247 replacement MR 31 relay
    Text: F A IR C H IL D LOW POWER S C H O T T K Y D A TA BOOK ERRATA SHEET 1977 Device Page Item Schematic 2-5 Figure 2-6. Blocking diode in upper right is reversed. Also, diode con­ necting first darlington emitter to output should have series resistor. LS33 5-25


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    SN74ALS123

    Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
    Text: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS


    OCR Scan     		PDF MIL-M-38510 SN74ALS123 SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138

    dm8130

    Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
    Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408


    OCR Scan     		PDF 54H00 54L00 54LS00 54H01 54L01 54LS01 54L02 54LS02 54L03 54LS03 dm8130 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76

    DM74367

    Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
    Text: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,


    OCR Scan     		PDF

    54LS641

    Abstract: CD Octal D-type flip-flop 74LS00 QUAD 2-INPUT NAND GATE 54LS642 54LS154 74LS00 quad TTL nand gate 74ls00 NAND gate SchottkyBarrierDiode 54LS92 54LS623
    Text: MAXIMUM RATINGS Supply Voltage - Vcc T h e S e rie s 5 4 L S /7 4 L S Schottky TTL family features both Schottky-barrier-diode inputs and em itte r inputs and u tilizes full Schottky-barrier-diode clamping to achieve speeds com parable to Series 54/74 at one-fifth of the


    OCR Scan     		PDF 54LS00 74LS00 24-LEAD 20-LEAD 54LS390/E 54LS393/C 54LS395A/E 54LS445/E 54LS490/E 54LS533/R 54LS641 CD Octal D-type flip-flop 74LS00 QUAD 2-INPUT NAND GATE 54LS642 54LS154 74LS00 quad TTL nand gate 74ls00 NAND gate SchottkyBarrierDiode 54LS92 54LS623

    NANO VTV

    Abstract: No abstract text available
    Text: SN54132, 54LS132, SN54S132, SN74132, SN74LS132, SN74S132 QUADRUPLE 2-INPUT POSITIVE-NAND SCHMITT TRIGGERS D ECEM BER 1 9 8 3 - I* • O p era tio n fro m V ery S lo w Edges Im p ro ve d teristics R E V IS E D M A R C H 1 9 8 8 S N 5 4 1 3 2 , S N 5 4 L S 1 3 2 , S N 5 4 S 1 3 2 . . . J OR W PACKAGE


    OCR Scan     		PDF SN54132, SN54LS132, SN54S132, SN74132, SN74LS132, SN74S132 NANO VTV

    7600401dx

    Abstract: FSCM 18324 M18510 54LS132 I44A
    Text: I R E V ISIO N S LTR DESCRIPTION OATE D Device 01 inactive for new desiqn. Add vendor, FSCM: 04713. 17 Sept 1985 E Remove vendor FSCM 18324. Delete minimum limits from propagation delay times. Hysteresis shall be guaranteed if not tested to specified limits.


    OCR Scan     		PDF M38510/31303Bâ D0D-STD-100 QPL-38510 7600401dx FSCM 18324 M18510 54LS132 I44A

    54S38

    Abstract: SN74298 SN74265 54175 NES 1004 naval specification 74L95 Transistor AF 138 07802-1 SN7437 SN54LS195A
    Text: m - G EN ER A L IN F O R M A TIO N INDEXES Numerical • Functional/Selection Guide O R D E R IN G INSTRUCTIO NS A N D M E C H A N IC A L D ATA 1 1 5 4/74 F A M IL Y SSI C IR CU ITS 2 I 54/74 F A M IL Y M S I/LSI C IR C U ITS 3 S E R IE S 29000 S S I C IR C U IT S


    OCR Scan     		PDF 38510/M D012510 D011520 D011510 54S38 SN74298 SN74265 54175 NES 1004 naval specification 74L95 Transistor AF 138 07802-1 SN7437 SN54LS195A

    74132PC

    Abstract: 74LS132PC 74S132PC
    Text: 132 CONINECTION DIAG RAM PINOUT A ^ 5 4 /7 4 1 3 2 /5 4 S /7 4 S 1 3 2 w e * 7 o /z t,^ 1 /5 4 L S /7 4 L S 1 3 2 , , . v ^ h '/ '/ /^ QUAD 2-INPUT ^ SCHMITT TRIGGER NAND GATE ORDERING CODE: PIN PKGS OUT 1— 1 See Section 9 COMMERCIAL GRADE MILITARY GRADE


    OCR Scan     		PDF 74132PC, 74S132PC 74LS132PC 74132DC, 74S132DC 74LS132DC 74132FC, 74S132FC 74LS132FC 54132DM, 74132PC

    2650B

    Abstract: wf vqc 10d alu 9308 d Signetics 2650 SN52723 2650 cpu 82S103 pipbug Signetics NE561 cd 75232
    Text: flcnCTICf ßii>ouiR/mos fflICROPROCEÍSOR DATfl mnnuni SIGNETICS reserves the right to make changes in the products contained in this book in order to improve design or performance and to supply the best possible products. Signetics also assumes no responsibility for the


    OCR Scan     		PDF

    82hs189

    Abstract: 54LS154 82HS187 OT27C256 27c64 signetics 54175 82HS641 sreg BDA BFA BKA 54S20
    Text: Signetics I Product Listing of I Contents of I Volume 2 Military Products I The following is a list of products whose data sheets are available in the Military Products Handbook, Volume 2. SECTION 1: ERASABLE PROM PRODUCTS Part Number Device Description Device


    OCR Scan     		PDF 27C512/BXA-20 27C512/BXA-25 27C256/BXA-20 27C256/BXA-25 27C256/BXA-30 27C256/BUA-20 27C256/BUA-25 32KX8 82hs189 54LS154 82HS187 OT27C256 27c64 signetics 54175 82HS641 sreg BDA BFA BKA 54S20

    74132PC

    Abstract: 74LS132 74132 pin diagram 74LS132PC 74S132 74S132PC LT 74 s 74132DC 74132FC 74LS132DC
    Text: 132 CONNECTION DIAGRAM PINOUT A 54/74132 4S/74S132 o / / ^ C 54LS/74LS132 , _ r c] h / / / /, QUAD 2-INPUT ° ^ S C H M ITT TRIGGER NAND GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE V cc = +5.0 V ±5%, T a = 0°C to +70° C


    OCR Scan     		PDF 4S/74S132 54LS/74LS132 74132PC, 74S132PC 74LS132PC 74132DC, 74S132DC 74LS132DC 74132FC 74S132FC 74132PC 74LS132 74132 pin diagram 74LS132PC 74S132 LT 74 s 74132DC 74LS132DC

    en1 3007

    Abstract: MlL-STD-853 1N3064 en1 3009 1/MIL-M-38510/313A
    Text: M3L-M-38510/313A 22 July H 8 3 W T R T T ï ï m MIL-M-38510/313 USAF 2 4 A u g u s t 1976 MILITARY MICROCIRCUITS, SCHMITT-TRIGGER DI G I T AL , L O W - P O W E R S C H O T T K Y TTL, POS I T I V E - N A N D G A T E S AND IN V E R T E R S , MONOLITHIC SILICON


    OCR Scan     		PDF MIL-M-38510/313A MIL-M-38510/313Ã MIL-M-38510, en1 3007 MlL-STD-853 1N3064 en1 3009 1/MIL-M-38510/313A

    DM54LS132J

    Abstract: DM54LS132W DM74LS132 DM74LS132M DM74LS132N J14A M14A N14A W14B 31B041
    Text: S E M IC O N D U C T O R tm DM74LS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs G G tlG T d l Description which increases th e noise im m unity and transform s a slow ly changing input signal to a fast changing, jitte r free output. This device contains four independent gates each of which


    OCR Scan     		PDF DM74LS132 DM54LS132J, DM54LS132W, DM74LS132M DM74LS132N DM54LS132J DM54LS132W DM74LS132 J14A M14A N14A W14B 31B041

    sn55470

    Abstract: 7544-1 transistor SN75326 SN7401 SN75426 54175 SN75270 SN55450 sn75493 National Semiconductor Linear Data Book
    Text: The Interface Circuits Data Book for Design Engineers First Edition IM P O R T A N T NO TICES Texas Instruments reserves the right to make changes at any tim e in order to im prove design and to supply the best product possible. T l cannot assume any responsibility for any circuits shown or


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    logos 4012B

    Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
    Text: L p i > « , * S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY S E M IC O N IN D E X E S L IM IT E D THE SEMICON INDEX SERIES CONSISTS OF VOLUME 1 TRANSISTOR INDEX VOLUME 2 DIODE & SCR INDEX


    OCR Scan     		PDF TDA1510 TDA1510A logos 4012B 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485

    t74ls157

    Abstract: 74LS00 fan out 74LS00E T74LS74 74LS00 QUAD 2-INPUT NAND GATE 74LS00 74LS00 nand gate NAND 74LS00 74ls00 series T74LS367
    Text: LOW POWER SCHOTTKY TTL-54/74 LS SERIES DESIGN CO NSIDERATIO NS SUPPLY VOLTAGE — +5V ±10% +5V ±5% T54 SERIES T74 SERIES NOISE MARGIN — V il 0.7V, V il 0.8V, 2.0V, 2 .0 V, V ih V ih Vol Vol 0.4V, V o h 2.5V 0.5V, V oh 2.7V T 5 4 SERIES T 7 4 SERIES INPUT LOADING —


    OCR Scan     		PDF TTL-54/74 74LS00 400/u 400mA SO-14. t74ls157 74LS00 fan out 74LS00E T74LS74 74LS00 QUAD 2-INPUT NAND GATE 74LS00 nand gate NAND 74LS00 74ls00 series T74LS367