54F11 Search Results

54f112

Abstract: sn54f112 CC153
Contextual Info: SM 54F112 , S N 7 4 F 11 2 D U AL J-K N EG A TIV E EDGE-TRIGGERED FLIP-FLOPS W ITH C LEAR AN D PRESET D2932, MARCH 1987-REVISED JANUARY 1989 • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil

Contextual Info: ADVANCE INFORMATION SN 54F114, SN 74F114 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET. COM MON CLEAR, AND COMMON CLOCK D2932, MARCH 1987 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil

Contextual Info: General Description This device contains three independent gates, each of which performs the logic AND function. Ordering Code: Commercial Military Package Number 74F11PC N14A 54F11DM Note 2 J14A te See Section 0 Package Description 14-Lead (0.300" Wide) Molded Dual-In-Line

54f112

Abstract: 54F112/BEA GDFP2-F16 GDIP1-T16
Contextual Info: Philips Semiconductors Military FAST Products Product specification Flip-flop 54F112 DESCRIPTION ORDERING INFORMATION The 54F112 is a dual J-K negative edge-lriggered flip-flop featuring individual J, K, Clock, Set and Reset inputs. The Set 5 q and Reset

Contextual Info: MOTOROLA M ilitary 54F112 Advance Information Dual J-K N e g a tive Edge-Triggered Flip-Flop M P0 m in i ELECTRICALLY TESTED PER: MIL-M-38510/34103 AVAILABLE AS: T h e 5 4 F 1 12 c o n s is ts o f t w o h ig h -s p e e d , c o m p le te ly in d e p e n d e n t J K

Contextual Info: M O TO RO LA Military 54F11 Triple 3-Input A N D G ate ELECTRICALLY TESTED PER: MIL-M-38510/34002 A VA ILA BLE A S: LOGIC DIAGRAM V cc Cl Y1 C3 B3 A3 1 JAN : JM 38510/34002BXA 2) S M D : • 3) 883C: 54F11/BXAJC Y3 r»i pài h h h rn m j X = C A S E O U TLIN E A S FO LLOW S:

Contextual Info: 54F11,74F11 Triple 3-Input AND Gate Literature Number: SNOS150A General Description This device contains three independent gates, each of which performs the logic AND function. Ordering Code: Commercial Military Package Number 74F11PC N14A 54F11DM Note 2

4f113

Abstract: F113
Contextual Info: ADVANCE INFORMATION SN 54F113, SM 7 4F113 DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS WITH PRESET 02932, M ARCH Package Options Include Plastic "S m a ll O u tline " Packages, Ceram ic C h ip Carriers, S N 5 4 F 1 13 . . . J P A C K A G E S N 7 4 F 1 13 . . . D O R N P A C K A G E

54F11

Abstract: GDFP1-F14
Contextual Info: Product specification Philips Semiconductors Military FAST Products 54F10/54F11 Triple three-input NAND ’F10 / AND (’F11) gates FUNCTION TABLE ORDERING INFORMATION PACKAGE DESIGNATOR* ORDER CODE DESCRIPTION 14-Pin Ceramic DIP 54F10/BCA, 54F11/BCA GDIP1-T14

Contextual Info: g MOTOROLA M ilitary 54F11 Triple 3-Input AND Gate MP0 ELECTRICALLY TESTED PER: MIL-M-38510/34002 « ///// LOGIC DIAGRAM Vqc C1 Y1 C3 B3 A3 Y3 nri frri [TT] rrn H nn it i AVAILABLE AS: 1) JAN: JM38510/34002BXA 2) SMD: N/A 3 )8 8 3 : 54F11/BXAJC X = CASE OUTLINE AS FOLLOWS:

Contextual Info: Signetics 54F10, 54F11 Gates Triple Three-Input NAND ’F10 AND (’F11) Gates Product Specification Military Logic Products ORDERING INFORMATION FUNCTION TABLE A B C Y(’F10) Y(’F11) L L L L H H H H L L H H L L H H L H L H L H L H H H H H H H H L L L

Contextual Info: ADVANCE INFORMATION SN 54F11, SN74F11 TRIPLE 3-INPUT POSITIVE-AND GATES D2932, MARCH 1987 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs S N 5 4 F 1 1 . . . J PACKAGE S N 7 4 F 1 1 . . . D OR N PACKAGE

sn74f113

Contextual Info: 54F113, SN74F113 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET B2932, MARCH 1 9 8 7 -R E V IS ÏD JANUARY 1989 • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DiPs SN 54F113 . . . J PACKAGE

sn74f114

Contextual Info: SN 54F114, S N 7 4 F1 14 DUAL J K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK D2932, MARCH 19B7 —REVISED JA N U A R Y 1989 54F114 Package Options Include Plastic "S m a ll SN74F114 O utline" Packages, Ceram ic Chip Carriers,

Contextual Info: Signetics 54F113 Flip-Flop Dual J-K Negative Edge-Triggered Flip-Flop Without Reset Product Specification Military Logic Products DESCRIPTION The 54F113 is a dual J-K negative edge-triggered flip-flop featuring indi­ vidual J, K, Set and Clock inputs. The

AJ7T

Contextual Info: Philips Semiconductors Military FAST Products Product specification Flip-flop 54F112 DESCRIPTION ORDERING INFORMATION The 54F112 is a dual J-K negative edge-triggered flip-flop featuring individual J, K, Clock, Set and Reset inputs. The Set <5d and Reset

Contextual Info: 74F11 Triple 3-Input AND Gate G eneral D escription This device contains three independent gates, each ot which performs the logic AND tunction. O rdering C o d e: Commercial Military Package Package Description Number 74F11 PC N14A 54F11DM Note 2 74F11SC (Note 1)

Contextual Info: M O T O R O L A SC 2SE D LOGIC • MOTOROLA b 3 b 7 S 5 E 0 0 0 3 7 1 1 =i ■ Military 54F112 Advance Information Dual J-K Negative Edge-Triggered Flip-Flop M PO Mini ELECTRICALLY TESTED PER: MIL-M-38510/34103 AVAILABLE AS: The S4F112 con sists of two high-speed, com pletely independent J K

Contextual Info: Philips Semiconductors Military FAST Products Product specification Triple three-input NAND F10 / AND (’F11) gates ORDERING INFORMATION DESCRIPTION FUNCTION TABLE ORDER CODE PACKAGE DESIGNATOR4 14-Pin Ceramic DIP 54F10/BCA, 54F11/BCA GDIP1-T14 14-Pin Ceramic Flat Pack

Contextual Info: 5 4 F 112 Signetics Dual J-K Negative Edge-Triggered Flip-Flop Product Specification Military Logic Products DESCRIPTION The 54F112 is a dual J-K negative edge-triggered flip-flop featuring individu­ al J, K, Clock, Set and Reset inputs. The Set 5 d and Reset (RD) inputs, when Low,

Contextual Info: 54F11, SN74F11 TRIPLE 3-INPUT POSITIVE-ANO GATES D2932, MARCH 1987-REVISED JANUARY 1989 • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mll DIPs SN64F11 . . . J PACKAGE SN74F11 . . . D OR N PACKAGE

sn76131

Abstract: tlo72cp TOSHIBA 2N3055 M53207P 2N3055 TOSHIBA KIA7313AP kia7640ap LA5530 M5L8155P TBB1458B
Contextual Info: ACTIVE ELECTRONICS COMPONENTS CROSS REFERENCE GUIDE 2SC429GTM 2SC458 2SC458LG 2SC503 2SC504 2SC510 2SC512 2SC519 2SC520A 2SC594 2SC699A 2SC780 2SC809-1 2SC945 2SC3012 2SC3074 2SC3114 2SC3115 2SC3116 2SC3117 2SC3134 2SC3135 2SC3138 2SC3143 2SC3144 2SC3145 2SC3157

5962-86872012A

Abstract: analog b2a LM555J 5962-9173801M2A Op amp cross reference 54F64LMQB 54F399DMQB 54F241/BSA 54F245DMQB 54F32/BDA
Contextual Info: N Worldwide Web http://www.national.com or http://www.national.com/appinfo/milaero N National to Philips Cross-Reference Guide – Analog & Logic Analog Cross Reference Philips Part Number SE521 Dual Differential Comparator SE527 Comparator SE529 Comparator

M38510 10102BCA

Abstract: SCX6206 marking code E5 SMD ic jm38510/10101bga SCX6B48AIS SNJ54LS165J JM38510/30004bca JM38510/10102BCA JM38510/10102BIA 946DMQB
Contextual Info: N ENHANCED SOLUTIONS DESIGN/PROCESS CHANGE NOTIFICATION formerly Military & Aerospace Division PCN Nr: 2000 Listing GIDEP Nr: GIDEP Category: Issued: 01/24/2000 TRB Nr: Product ID (Description): Proposed Date of Change: Description of Change: Effect of Change: