Untitled
Abstract: No abstract text available
Text: GLT44032-E 128K x 32 Embedded EDO DRAM Macro FEATURES ◆ Logical organization: 128Kx32 bits ◆ Physical organization: 512x256x32 ◆ Single 3.3v ± 0.3v power supply ◆ 512-cycle refresh in 8 ms ◆ Refresh modes: RAS only, CBR, and Hidden ◆ Single CAS with 4 DQM for Byte Write control
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GLT44032-E
128Kx32
512x256x32
512-cycle
GLT44032-E
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GLT44032-E
Abstract: No abstract text available
Text: GLT44032-E 128K x 32 Embedded EDO DRAM Macro FEATURES ◆ Logical organization: 128Kx32 bits ◆ Physical organization: 512x256x32 ◆ Single 3.3v ± 0.3v power supply ◆ 512-cycle refresh in 8 ms ◆ Refresh modes: RAS only, CBR, and Hidden ◆ Single CAS with 4 DQM for Byte Write control
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GLT44032-E
128Kx32
512x256x32
512-cycle
GLT44032-E
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mo118
Abstract: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH led matrix 8x8 message circuit MSAN-123 MT8980D MT8986 MT89L86 MT89L86AN MT89L86AP
Text: CMOS ST-BUS FAMILY MT89L86 Multiple Rate Digital Switch Advance Information Features • • • • • • • • • • • • • DS5195 3.3 volt supply 5V tolerant inputs and TTL compatible outputs. 256 x 256 or 512 x 256 switching configurations
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MT89L86
DS5195
1999all
mo118
3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH
led matrix 8x8 message circuit
MSAN-123
MT8980D
MT8986
MT89L86
MT89L86AN
MT89L86AP
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Allen-Bradley cvim
Abstract: vernierarrows connector cross reference rgb led moving message display circuit linear technology catalog
Text: Important User Information Solid state equipment has operational characteristics differing from those of electromechanical equipment. “Application Considerations for Solid State Controls” Publication SGI- 1.1 describes some important differences between solid state equipment and hard-wired electromechanical devices.
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5370-ND009
Allen-Bradley cvim
vernierarrows
connector cross reference
rgb led moving message display circuit
linear technology catalog
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ss100 transistor
Abstract: DF1 PROTOCOL 1771-DA 1784-T50 PROGRAMMER c7 ss100 PLC Allen-Bradley 6008-SI PLC-2 Communication cables pin diagram 1784-T35 rack plc programming languages
Text: ALLEN-BRADLEY Bulletin 5370 Color CVIM Configurable Vision Input Module Communications Manual Important User Information Solid state equipment has operational characteristics differing from those of electromechanical equipment. “Safety Guidelines for the Application,
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ND010
ss100 transistor
DF1 PROTOCOL
1771-DA
1784-T50 PROGRAMMER
c7 ss100
PLC Allen-Bradley
6008-SI
PLC-2 Communication cables pin diagram
1784-T35 rack
plc programming languages
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TC528257
Abstract: n724
Text: TOSHIBA SILICON GATE CMOS TC528257 t a r g e t s p e c 262,144WORDS X 8BITS MULTIPORT DRAM DESCRIPTION The TC528257 is a 2M bit CM OS multiport m em ory equipped with a 262,144-w ords by 8 -bits dynam ic random access m em ory RAM port and a 512-words by 8 -bits static serial access m emory (SA M ) port. The
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TC528257
144WORDS
TC528257
144-w
512-words
TC528257J/SZ/nVTR1017240
TC528257J/SZ/FT/TR-70
TC528257J/SZ/FT/TR-80
n724
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SF229
Abstract: toshiba s105
Text: TOSHIBA TC528257 t a r g e t s il ic o n g a t e c m o s s p e c 262,144WORDS X 8BITS MULTIPORT DRAM DESCRIPTION T h e T C 5 2 8 2 5 7 is a 2M b it C M O S m u ltip o rt m e m o ry eq u ip p e d w ith a 2 6 2 ,1 4 4 -w o rd s b y ra n d o m a ccess m e m o ry R A M p o rt a n d a 5 1 2 -w o rd s by
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TC528257
144WORDS
SF229
toshiba s105
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TC518129
Abstract: de interlace
Text: TOSHIBA TC518129AP/ASP/AF/AFW-80/10/12 TC518129APL/ASPL/AFL/AFWL30/10/12 TC518129AFTLS0/10/12 SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1 8 1 2 9 A is a 1M bit high speed C M O S p se udo static R AM organized as 131,07 2 w o rd s by 8 bits. The TC 5 18 1 29A utilizes
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TC518129AP/ASP/AF/AFW-80/10/12
TC518129APL/ASPL/AFL/AFWL30/10/12
TC518129AFTLS0/10/12
TC518129APL/ASPL/AFL/AFWL/AFTL-80/10/12
AO-A16
TC518129
de interlace
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TC518128
Abstract: tc518128cfl80 TC518128CFL-80 cfl circuit diagrams TC518128CFL-70
Text: INTEGRATED TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT CIRCUIT TC 5 1 8 1 2 8 C P L /C S P L /C F L / CFWL / CFTL - 7 0 , TC 5 1 8 1 2 8 CPL / CSPL / CFL / CFWL / CFTL - 8 0 TC 5 1 8 1 2 8 CPL / C S PL/ CFL / CFWL / CFTL - 1 0 , TC 5 1 8 1 2 8 CPL/ CSPL / CFL/ CFW L/ CFTL - 7 0 L
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072-WORD
18128C
578-bit
TC518128CFWL-70,
TC518128CFWL-80,
TC518128CFWL-10,
TC518128CPL--
TC518128
tc518128cfl80
TC518128CFL-80
cfl circuit diagrams
TC518128CFL-70
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518128
Abstract: 518128apl TC518128
Text: TOSHIBA TC518128APL/AFL/AFWL-80LV/10LV/12LV TC518128AFTLS0LV/10LV/12LV SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description T h e T C 5 1 8 1 2 8 A -L V is a 1M bit high speed C M O S p se udo static R AM organized as 131,07 2 w o rd s b y 8 bits. The T C 5 1 8 1 2 8 A -L V
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TC518128APL/AFL/AFWL-80LV/10LV/12LV
TC518128AFTLS0LV/10LV/12LV
518128APLyAFL/AFW
L/AFTL-80LV/1
OLV/12LV
518128APL/AFL/AFW
L/AFTL-80LV/1O
LV/12LV
2SA1015
518128
518128apl
TC518128
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TC518129AFwl
Abstract: No abstract text available
Text: TOSHIBA TC518129APL/AFL/AFWL-80LV/lOLV/12LV TC518129AFTL80LV/lOLV/12LV SILICON GATE CM O S 131,072 W ORD x 8 BIT C M O S PSEUDO STATIC RAM D escription The TC5181 29A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129A-LV
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TC518129APL/AFL/AFWL-80LV/lOLV/12LV
TC518129AFTL80LV/lOLV/12LV
TC5181
TC518129A-LV
D-112
TC518129APL/AFL/AFWL/AFTL-80LV/1OLV/12LV
D-113
TC518129APL/AFL/AFWL/AFTL-80LV/1
TC518129AFwl
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TC524258
Abstract: TC524259BJ C69 WML dsf03
Text: TOSHIBA TC524259B s il ic o n g a t e c m o s 262, 144WORDS X 4BITS MULTIPORT DRAM target DESCRIPTION The TC524259B is a CMOS multiport memory equipped with a 262,144-words by 4-bits dynamic random access memory RAM port and a 512-words by 4-bits static serial access memory (SAM) port. The TC524259B
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144WORDS
TC524259B
TC524259B
144-words
512-words
TC524258B
C-112
TC524258
TC524259BJ
C69 WML
dsf03
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7c251
Abstract: a1s smd smd code A1s smd diode code A1s CY7C251 CY7C254 65WMB
Text: CY7C251 CY7C254 y CYPRESS 16K x 8 Power-Switched and Reprogrammable PROM • Direct replacement for bipolar PRO M s • C apable o f w ithstanding > 2001V static discharge Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed
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CY7C251
CY7C254
7C251)
300-mil
600-mil
CY7C254
384-word
Y7C251
7c251
a1s smd
smd code A1s
smd diode code A1s
65WMB
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Untitled
Abstract: No abstract text available
Text: High Performance 128Kx8 C M O S SRAM p i AS7C1024 AS7C1024L 128Kx8 CM O S S RAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Equal access and cycle times • High speed • Easy memory expansion with CE1, CE2, OE inputs - 10/12/15/20/25/35 ns address access time
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128Kx8
AS7C1024
AS7C1024L
128Kx8
32-pin
7C256
7C512
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star tracker
Abstract: No abstract text available
Text: Other Custom Products FORMAT P IX E L S IZ E ii TYPE FEATURES 512x512 15x15 Full Frame 1024x1024 15x15 Full Frame Standard Catalog Item 2048 x 2048 7.5 X 7.5 Full Frame 2048 x 2048 15x15 Full Frame 4096 x 4096 7.5 x 7.5 Full Frame 4096 x 4096 15x15 Full Frame
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512x512
15x15
1024x1024
12x12
800x800
star tracker
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Untitled
Abstract: No abstract text available
Text: TC518129CPL/CFWL/CFIL-70/80/10 TC518129CPL/CFWL/CFIL-70L/80L/10L SILICON GATE CMOS P R E L IM IN A R Y 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM D e s c rip tio n The T C 5 1 8 1 2 9 C is a 1 M bit high speed C M O S pse udo static RAM organized as 131,072 w o rd s by 8 bits. T h e T C 5 1 8 1 2 9 C utilizes
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TC518129CPL/CFWL/CFIL-70/80/10
TC518129CPL/CFWL/CFIL-70L/80L/10L
Q02bbl3
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Untitled
Abstract: No abstract text available
Text: CY7C251 CY7C254 CYPRESS SEMICONDUCTOR Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 45 ns 16,384 x 8 PROM Power Switched and Reprogrammable • TTL-compatible I/O • D irect replacement for bipolar PROMs • Capable o f w ithstanding > 2001V stat
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CY7C251
CY7C254
7C251)
300-m
600-mil
CY7C251
CY7C254
384-word
PROMs3802
CY7C254â
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TC524258AZ
Abstract: No abstract text available
Text: TOSHIBA DIGITAL INTEGRATED CIRCUIT INTEGRATED CIRCUIT TC524258AJ/AZ-10 . TC524258AJ/ A Z-12 TO SHIBA TECHNICAL DATA SILICON GATE CMOS PRELIMINARY 262, 144W 0R D S X48ITS MULTIPORT DRAM DESCRIPTION The TC524253AJ/AZ is a CM OS multiport memory equipped with a 262,144-words by 4-bits
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TC524258AJ/AZ-10
TC524258AJ/
X48ITS
TC524253AJ/AZ
144-words
512-words
TC524253AJ7
bein51
TC524253AJ
TC524258AJ
TC524258AZ
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Untitled
Abstract: No abstract text available
Text: TOSHIBA TC528257 t a r g e t s il ic o n g a t e c m o s 262,144WORDS X 8BITS MULTIPORT DRAM DESCRIPTION T h e T C 5 2 8 2 5 7 is a 2 M b it C M O S m u ltip o rt m e m o ry e q u ip p e d w ith a 2 6 2 ,1 4 4 -w o rd s b y ra n d o m access m e m o ry R A M p o rt an d a 5 1 2 -w o rd s b y
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TC528257
144WORDS
C-231
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Untitled
Abstract: No abstract text available
Text: INTEGRATED T O SH IB A TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT CIRCUIT TECHNICAL TC518128 CPL / CFL / CFWL / CFTL - 70V TC518128 CPL / CFL / CFWL / CFTL -80V TC518128 CPL / CFL / CFWL / CFTL -10V DATA SILICON GATE CMOS 131,072-WORD BY 8-BIT CMOS PSEUDO STATIC RAM
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TC518128
072-WORD
TC518128CPL/CFL/CFWL/CFTL
578-bit
OP32-P-525)
1o25iHi|
TC518128CFWL
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st d83
Abstract: TC518128C d83 st
Text: TOSHIBA TC518128CPL/CSPL/CFL/CFWL/CFIL-70/80/10 TC518128CPL/CSPL/CFL/CFWL/CFIL-70L/80L/10L PRELIMINARY SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description T h e T C 5 1 8 1 2 8 C is a 1M bit high speed C M O S pse udo static RAM organized as 131,07 2 w o rd s by 8 bits. The TC 5 18 1 28C utilizes
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TC518128CPL/CSPL/CFL/CFWL/CFIL-70/80/10
C518128CPL/CSPL/CFL/CFWL/CFIL-70L/80L/10L
TC518128CPL/CSPUCFL/CFWL/CFTL-70/80/10
CS18128CPL/CSPL/CFL/CFWL/CFTL-70L/80L/1OL
st d83
TC518128C
d83 st
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Untitled
Abstract: No abstract text available
Text: fax id: 1047 CY7C109 CY7C1009 ^C YPR ESS 128K x 8 Static RAM active HIGH chip enable CE 2 , an active LOW output enable (OE), and three-state drivers. Writing to the device is accom plished by taking chip enable one (CE-|) and write enable (WE) inputs LOW and chip enable two (CE 2 ) input HIGH. Data on
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CY7C109
CY7C1009
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Untitled
Abstract: No abstract text available
Text: <ä v GM76C8128A/AL/ALL GoldStar 131,072 WORDS x 8 BIT CMOS STATIC RAM GOLDSTAR ELECTRON CO., LTD. Pin Configuration Description The GM76C8128A/AL/ALL is a 1,084,576 bits stat ic random access memory organized as 131,072 words by 8 bits. Using a 0.8um advanced CMOS
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GM76C8128A/AL/ALL
GM76C8128A/AL/ALL
70/85/100ns.
32-pin
600mil)
402A7S7
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Untitled
Abstract: No abstract text available
Text: KM658128/L/L-L/LD/LD-L Pseudo SRAM SAMSUNG ELECTRONICS INC 42E D BB 7 ^ 4 1 4 2 12 8K X 8 Bit CMOS Pseudo Static RAM . QQiaflSS T f FEATURES GENERAL DESCRIPTION • Fast Access Time: — 5 1 Access Time . 80,100,120ns Max. — Cycle Time . Random Read/Write Cycle
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KM658128/L/L-L/LD/LD-L
120ns
190ns
200mW
KM658128LD/
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