512BITS Search Results

Contextual Info: FM11RF005U 512Bits EEPROM Contactless Smart Card IC Functional Specification Oct. 2007 FM11RF005U 512Bits Contactless Smart Card IC Ver. 1.0 Functional Specification 1 INFORMATION IN THIS DOCUMENT IS INTENDED AS A REFERENCE TO ASSIST OUR CUSTOMERS IN THE SELECTION OF

Contextual Info: FM11RF005M 512Bits EEPROM Contactless Smart Card IC Functional Specification May. 2008 FM11RF005M 512Bits Contactless Smart Card IC Ver. 1.1 Functional Specification 1 INFORMATION IN THIS DOCUMENT IS INTENDED AS A REFERENCE TO ASSIST OUR CUSTOMERS IN THE SELECTION OF

contactless

Contextual Info: FM11RF005SH 512Bits EEPROM Contactless Smart Card IC Functional Specification Oct. 2007 FM11RF005SH 512Bits Contactless Smart Card IC Ver. 1.0 Functional Specification 1 INFORMATION IN THIS DOCUMENT IS INTENDED AS A REFERENCE TO ASSIST OUR CUSTOMERS IN THE SELECTION OF

contactless

Contextual Info: FM11RF005M 512Bits EEPROM Contactless Smart Card IC Functional Specification Oct. 2007 FM11RF005M 512Bits Contactless Smart Card IC Ver. 1.0 Functional Specification 1 INFORMATION IN THIS DOCUMENT IS INTENDED AS A REFERENCE TO ASSIST OUR CUSTOMERS IN THE SELECTION OF

80C32

Abstract: DS2502-E48 DS80C400 DS80C400-FNY J-STD-020A
Contextual Info: DS80C400 Network Microcontroller www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS80C400 network microcontroller offers the highest integration available in an 8051 device. Peripherals include a 10/100 Ethernet MAC, three serial ports, a CAN 2.0B controller, 1-Wire Master, and 64 I/O pins.

Contextual Info: 47E D SIEMENS • fi23SbOS 0031bl0 <3 ■ SIEG SIEMENS AKTIENGESEL LSCHAF SAB 82C212 Page/Interleave Memory Controller of Siemens PC-AT Chipset Advance Information 157 3.90 M7E » I fl2 3 5 b 0 5 G 0 3 1 b ll SIEMENS AKTIENGESELLSCHAF □ ■ S IE G SAB 82C212

m514262

Abstract: MSM514262 MSM514262-10 MSM514262-70 MSM514262-80 ZIP28-P-400 M5M51426 MSM51426
Contextual Info: O K I Semiconductor MSM5 14262 262,144-Word x 4-Bit Multiport DRAM DESCRIPTION The MSM514262 is a 1-Mbit CMOS m ultiport DRAM com posed of a 262,144-word by 4-bits dynam ic RAM and a 512-words b y 4-bits SAM. Its RAM and SAM operate independently and asynchronously.

MB87S

Abstract: MB502A FUJITSU SOLID STATE RL MB8795B ethernet id4 d fujitsu ten MB502
Contextual Info: Preliminary FU JITSU A d v a n c e d P ro d u cts • MB8795B Ethernet Data Link C ontroller D e s c rip tio n The Fujitsu MB8795B Ethernet Data Link C on tro lle r EDLC manufactured w ith Fu jitsu ’s Advanced CM OS Technology, is designed fo r Ethernet* Local Area N etw ork Systems and to

EM48AM3284LBA

Abstract: EM48AM3284LBA-75F EM48AM3284LBA-75FE
Contextual Info: eorex EM48AM3284LBA 512Mb 4Mx4Bank×32 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 1.8V +/- 0.1V Power Supply • LVCMOS Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8

Contextual Info: DS2154 PRELIMINARY DALLAS SEMICONDUCTOR DS2154 Enhanced E1 Single Chip Transceiver PACKAGE OUTLINE FEATURES • Complete E1 CEPT PCM-30/ISDN-PRI transceiver functionality • Onboard long and short haul line interface for clock/ data recovery and waveshaping

Contextual Info: JUl 8 7 June 1992 Edition 1.0A DATA SH E ET '• _ FUJITSU MB814800A-70/-80/-10 CMOS 512Kx 8 Bits Fast Page Mode Dynamic RAM The Fujitsu M B814800A is a fully decoded CMOS Dynam ic RAM DRAM that contains 4,194,304 m em ory cells accessible in 8-bit increments. The M B814800A features a fast

marking code EY SMD

Abstract: PC100-222-620 P-TSOPII-54
Contextual Info: HYB39L256160AC/T 256MBit 3.3V Mobile-RAM 256 MBit Synchronous Low-Power DRAM Data Sheet Revision Dec. 2002 • Automatic and Controlled Precharge Command Features -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page tCK3,MIN

SHA256

Abstract: Atmel tape and reel spec 8-lead SOIC
Contextual Info: Atmel AT88SA102S Atmel CryptoAuthentication Product Authentication Chip DATASHEET Not Recommended for New Designs Replaced by ATSHA204 Features • • • • • • • • • • • Secure authentication and key exchange Superior SHA-256 hash algorithm

pin configuration 1K variable resistor

Abstract: EPC1441 EPC16 EPCS128 EPCS16 EPCS64 EPC8QC100 EPC8QC100 Pinout fpga JTAG Programmer Schematics ic 11105 circuits diagraM
Contextual Info: Configuration Handbook Preliminary Information 101 Innovation Drive San Jose, CA 95134 www.altera.com Config-1.3 September 2007 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

Contextual Info: EM48AM1684VTG Revision History Revision 0.1 Jun. 2010 - First release. - Jun. 2010 1/20 www.eorex.com EM48AM1684VTG 256Mb (4Mx4Bank×16) Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge The EM48AM1684VTG is Synchronous Dynamic

Contextual Info: DALLAS SEMICONDUCTOR PRELIMINARY 3.3V DS21354 and 5V DS21554 E1 Single Chip Transceivers SCT FEATURES R ftC K A G E O U T LIN E Complete E1 (CEPT) PCM-30/ISDN-PRI transceiver functionality Onboard long and short haul line interface for clock/data recovery and waveshaping

am79c940

Contextual Info: a Advanced Micro Devices Am79C940 Media Access Controller for Ethernet MACE DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ ■ ■ ■ ■ Integrated Controller with 10BASE-T transceiver and AUI port Supports IEEE 802.3/ANSI 8802-3 and Ethernet standards

C3243

Abstract: ATI Rage ITT K12 series switch IDT74FCT245 MIPS32 RC32 RC32434
Contextual Info: IDT T M InterpriseT M Integrated Communications Processor Device Overview PCI Interface – 32-bit PCI revision 2.2 complia nt – Supports host or satellite operation in both master and target modes – Support for synchronous and asynchronous operation – PCI clock supports frequencies from 16 MHz to 66 MHz

Contextual Info: EM48BM0884VTA Revision History Revision 0.1 Aug. 2011 - First release. Aug. 2011 1/20 www.eorex.com EM48BM0884VTA 256Mb (8Mx4Bank×8) Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge The EM48BM0884VTA is Synchronous Dynamic

DS2502-E48

Abstract: DS80C410 DS80C410-FNY DS80C411 DS80C411-FNY
Contextual Info: DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS80C410/DS80C411 network microcontrollers offer the highest integration available in an 8051 device. Peripherals include a 10/100 Ethernet MAC, three serial

AT88SA102S-TSU-T

Abstract: AT88SA102S 8584F
Contextual Info: Atmel AT88SA102S Atmel CryptoAuthentication Product Authentication Chip DATASHEET Not Recommended for New Designs Replaced by ATSHA204 Features • • • • • • • • • • • Secure authentication and key exchange Superior SHA-256 hash algorithm

ELAP CM 72

Abstract: ELAP cm 76 fm transmitter 2KM documentation DDU-66F-XXX ELAP CM 140 hp laptop battery pack pinout semi catalog EB 203 D maxim evaluation kit touch dimmer TC 306 S
Contextual Info: Data B ook C o n t e n t s •S h o r t • F irst • S a l e s -Fo -Pa O rm g e C atalog Data S h e e t s ffic es CD •C ROM C o n ten ts: o m p l e t e Data S an d A pplication fo r A l l • U s e r 's G P h e e t s n o t e s r o d u c ts uides p. -••x;. < ~x3xxr r -> ~' ' fP 5 > g? 3

AT88SA102S

Abstract: AT88SA10HS CRC-16 SHA-256 SHA256
Contextual Info: Atmel AT88SA10HS Atmel CryptoAuthentication Host Security Chip DATASHEET Features • • • • • • • • • • • Secure key storage to complement the Atmel AT88SA100S and the Atmel AT88SA102S devices Superior SHA-256 hash algorithm Guaranteed Unique 48-bit serial number

IDT74FCT245

Abstract: MIPS32 RC32434
Contextual Info: RC32434 IDTTM InterpriseTM Integrated Communications Processor Device Overview PCI Interface – 32-bit PCI revision 2.2 compliant – Supports host or satellite operation in both master and target modes – Support for synchronous and asynchronous operation