41BIT Search Results

uPD16300

Abstract: uPD16302
Contextual Info: Preliminary N E C ELECTRON DEVICE MOS INTEG RATED _¿ ¿ P D 41bit T he pa n e l . WPD16302 is a R O W d r i v e r It c o n s i s t s of a 41bit 1 6 3 Specification C I R C U I T S G F DC • PDP driver utilized high bidirectional Bi-CXOS

Contextual Info: KM44C1004D, KM44V1004D CMOS DRAM 1M x 4Bit CMOS Dynamic RAM with Extended Data Out DESCRIPTION This is a family of 1,048,576 x 41bit Extended Data Out CMOS DRAMs. Extended Data Out offers high speed random access of memory cells within the same row. Power supply voltage +5V or +3.3V , access time (-5, -6 or -7), power consumption(Normal or Low power),

Contextual Info: DATA SHEET MOS I N T E G R A T E D C I R C U I T /¿PD16307 4 1 b i t D C - P D P ROW D R I V E R I C s DESCRIPTION The UPD16307 is a ROW driver utilized high voltage Bi-CMOS process for DC plasma display panel. It consists of a 41bit bi-directional shift-register and high voltage NPN transitors.

Contextual Info: DATA SHEET MOS I N T E G R A T E D C I R C U I T / i P D l 6 3 0 7 4 1 b i t D C - P D P ROW D R I V E R I C s DESCRIPTION The uPD16307 is a ROW driver utilized high voltage Bi-CMOS process for DC plasma display panel. It consists of a 41bit bi-directional shift-register and high voltage NPN transitors.

TC9803

Abstract: CK101 TC9801
Contextual Info: TC9803P, TC9803FW TC9803 is a CMOS programmable logic device PLD based on EEPROM cells. Designed using Toshiba's original technology, this device features low power dissipation and inputs that are compatible w ith TTL, NMOS, and CMOS output voltage levels.

in138

Abstract: SPARC v9 architecture BLOCK DIAGRAM cpu lga UltraSPARC ii
Contextual Info: S un M icro electro nics July 1997 UltraSPARC -!! CPU Module DATA SHEET Complete 296 MHz CPU, 2.0 MB E-Cache, UDB-II D e s c r ip t io n The UltraSPARC-II module is a high performance, SPARC V9 compliant, small form factor processor module. It interfaces to the UltraSPARC Port Architecture UPA interconnect bus.

Contextual Info: Spansion Analog and Microcontroller Products The following document contains information on Spansion analog and microcontroller products. Although the document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion

MB9A140NA DS706-00040

Abstract: MB9AF144NA
Contextual Info: Spansion Analog and Microcontroller Products The following document contains information on Spansion analog and microcontroller products. Although the document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion

Contextual Info: C8051F97x Low Power Capacitive Sensing MCU with up to 32 kB of Flash Low Power Consumption - 200 µA/MHz in active mode 24.5 MHz clock - 2 µs wakeup time - 55 nA sleep mode with brownout detector - 280 nA sleep mode with LFO - 600 nA sleep mode with external crystal

e500v2

Abstract: MPC8544 JTAG connector Samsung Nexus S samsung emcp ordering information NV 15F PCI express PCB footprint MSC8101 TLC 1298 SRam program 61256 apple crypto
Contextual Info: MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual Supports MPC8544E MPC8544 MPC8544ERM Rev. 1 10/2007 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed:

W48C60

Abstract: J0801 w48c60-422 J0901 MC100LVEL39 MC12430 SME5410MCZ-270 587-pin TMS 3450 TMS 3450 specifications
Contextual Info: SME5410MCZ-270 July 1998 UltraSPARC -IIi CPU Module DATA SHEET 270 MHz CPU, 256 Kbyte E-cache, UPA, 66 MHz PCI DESCRIPTION The UltraSPARC™-IIi CPU module SME5410MCZ-270 is a high performance, SPARC V9-compliant, small form-factor CPU module. It interfaces to the UltraSPARC Port Architecture 64S (UPA64S) interconnect bus,

LG E500

Abstract: 4000 CMOS texas instruments 16 PIN PIR controller IC PINOUT JTAG connector Samsung Nexus S NAN transistor TO-66 pic 8259 cable 1747 pic pin outs MPC8560 tsec rgmii configuration adb 634 MPC826* debug register
Contextual Info: MPC8540 PowerQUICC III Integrated Host Processor Reference Manual MPC8540RM Rev. 1 07/2004 How to Reach Us: USA/Europe/Locations Not Listed: Freescale Semiconductor Literature Distribution Center P.O. Box 5405, Denver, Colorado 80217 1-480-768-2130 800 521-6274

iec 62053-21 kwh

Abstract: 10-IAp three phase energy meter using ade7758 ADE7758 energy measurement using ADE7758 220v ac to 5v dc converter circuit energy meter circuit diagram using ade7758 10mhz crystal oscillator iec 62053-21 ade7758 kwh meter
Contextual Info: Poly Phase Multifunction Energy Metering IC with Per Phase Information ADE7758 Data Sheet FEATURES Proprietary ADCs and DSP provide high accuracy over large variations in environmental conditions and time Reference 2.4 V drift 30 ppm/°C typical with external

PPC460EX

Abstract: PPC460EX-SUB1000T power pc 460ex PPC460EX-SUB1000-T PPC460EX-SUB1000 ppc460 PPC460EX-SUB PPC460EXSUB1000T amcc 460EX AMCC PPC460EX
Contextual Info: Part Number 460EX Revision 1.19 – June 17, 2009 460EX Preliminary Data Sheet PowerPC 460EX Embedded Processor Features • PowerPC 440 processor operating between 600MHz and 1.000GHz with 32KB I-cache and Dcache and 256KB L2/SRAM with parity checking • On-chip memory 64KB

ecc84

Abstract: embedded powerpc 460 AMCC 460, DATE CODE 440GR E800 EF40 PPC440 PPC440GR PPC440GR-3JB667CZ epbga
Contextual Info: Part Number 440GR Revision 1.19 – May 07, 2008 440GR Preliminary Data Sheet PowerPC 440GR Embedded Processor Features • PowerPC 440 processor core operating up to 667MHz with 32KB I-cache and D-cache with parity checking. • Two Ethernet 10/100Mbps half- or full-duplex

5a 12v dc dc converter

Contextual Info: LTC2978A 8-Channel PMBus Power System Manager Featuring Accurate Output Voltage Measurement Description Features n n n n n n Sequence, Trim, Margin and Supervise Eight Power Supplies Manage Faults, Monitor Telemetry and Create Fault Logs PMBus Compliant Command Set

GIGABYTE G31

Abstract: SPARC v9 architecture BLOCK DIAGRAM stream register cache coherency snoop filter AF10 AH22 "64-Bit Microprocessor" STP1030 d4ta
Contextual Info: STP1030A July 1997 UltraSPARC -I DATA SHEET First Generation SPARC v9 64-Bit Microprocessor With VIS DESCRIPTION The STP1030A, UltraSPARC–I, is a high-performance, highly-integrated superscalar processor implementing the SPARC V9 64-bit RISC architecture. The STP1030A is capable of sustaining the execution of up to four instructions per

CL-SH350

Abstract: 1178H 214-3500
Contextual Info: 4 7991 CL-SH350 rCIRRUS LOGIC FEATURES Microcontroller Interface: • Supports high-speed microcontroller interfaces e.g., 16 MHz 8051,12 MHz 68HC11,30 MHz HPC460X3 SCSI Interface: ■ Supports SCSI-2 Initiation and Target modes ■ Supports asynchronous DMA/PIO transfers up to 3

R2AA04005F

Abstract: PA035C P30B06040 P50B0400 p50b07040 RS1A03 Q2AA10150
Contextual Info: M0007902B TYPE S RS485 GA1060 Serial Interface For Rotary Motor Instruction Manual EN GL I SH No Text on This Page. Preface ÌShipping the product This product in this instruction manual corresponds with the shipping regulations given in the Export Trade Control Ordinance Table 1, item 16 . When these products are exported by

LD2SA

Abstract: BTS 308 INTEL I7 prefetch MSR 7A SF fds 4418 STi 5197 register configuration instruction set architecture intel i7 wn 537 a 8086 mnemonic opcode intel 8086
Contextual Info: Intel IA-64 Architecture Software Developer’s Manual Volume 3: Instruction Set Reference Revision 1.1 July 2000 Document Number: 245319-002 THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY,

Contextual Info: PowerPC 440GP Embedded Processor Data Sheet Features • PowerPC 440 processor core operating up to 500MHz with 32KB I- and D-caches • Two Ethernet 10/100Mbps half- or full-duplex interfaces. Operational modes supported are MII, RMII, and SMII. • On-chip 8 KB SRAM

powerpc 464

Abstract: CPU Intel Celeron D 347 embedded powerpc 460 BCA16 464-H90 IM258 embedded powerpc 440 EA18 EA23 EA24
Contextual Info: Title Page PowerPC 464 H90 Embedded Processor Core User’s Manual October 6, 2010 Copyright and Disclaimer Copyright International Business Machines Corporation 2006, 2010 Printed in the United States of America October 2010 IBM, the IBM logo, and ibm.com are trademarks or registered trademarks of International Business Machines Corp.,

Contextual Info: FM0+ S6E1A1 Series 32-bit ARM Cortex®-M0+ based Microcontroller S6E1A11B0A/S6E1A11C0A,S6E1A12B0A/S6E1A12C0A Data Sheet Full Production Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume

Contextual Info: MB9B420T Series TM 32-bit ARM CortexTM-M3 based Microcontroller MB9BF429S/T, MB9BF428S/T Data Sheet Preliminary Publication Number MB9B420T_DS706-00061 CONFIDENTIAL Revision 0.2 Issue Date January 31, 2014 D a t a S h e e t ( P r e l i m i n a r y ) MB9B420T_DS706-00061-0v02-E, January 31, 2014