Untitled
Abstract: No abstract text available
Text: MOTOROLA Order this document by MPC950/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC950 MPC951 The MPC950/951 are 3.3V compatible, PLL based clock driver devices targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC950 is
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AZ10EL89
Abstract: AZ10EL89D MC10EL89
Text: ARIZONA MICROTEK, INC. AZ10EL89 ECL/PECL Coaxial Cable Driver FEATURES • • • • • • PACKAGE AVAILABILITY 375ps Propagation Delay PACKAGE PART NUMBER MARKING NOTES 1.6V Output Swing SOIC 8 AZ10EL89D AZM10EL89 1,2 1 Add R1 at end of part number for 7 inch 1K parts , R2 for 13 inch (2.5K parts)
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HEL89
Abstract: HEL89 application note
Text: COAXIAL CABLE DRIVER FEATURES • ■ ■ ■ SY10EL89 FINAL DESCRIPTION 375ps propagation delay 1.6V output swings Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10EL89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially
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Untitled
Abstract: No abstract text available
Text: MOTOROLA Order this document by MPC951/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver 2 The MPC951 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC951 is ideal for the
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Q205
Abstract: SY10EL89 SY10EL89ZC SY10EL89ZCTR
Text: COAXIAL CABLE DRIVER FEATURES • ■ ■ ■ SY10EL89 DESCRIPTION 375ps propagation delay 1.6V output swings Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10EL89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially
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AN1091
Abstract: AN1545 MPC950
Text: MOTOROLA Order this document by MPC950/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC950 The MPC950 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC950 is ideal for the
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Untitled
Abstract: No abstract text available
Text: MOTOROLA Order this document by MPC950/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC950 MPC951 The MPC950/951 are 3.3V compatible, PLL based clock driver devices targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC950 is
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MPC950/951
180MHz
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SY10EL89
Abstract: SY10EL89ZC SY10EL89ZCTR
Text: COAXIAL CABLE DRIVER FEATURES • ■ ■ ■ SY10EL89 FINAL DESCRIPTION 375ps propagation delay 1.6V output swings Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10EL89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially
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Untitled
Abstract: No abstract text available
Text: MOTOROLA Order this document by MPC950/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver 2 The MPC950 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC950 is ideal for the
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AN1091
Abstract: MPC950 MPC951 DSA0038473 Nippon capacitors
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC950 MPC951 The MPC950/951 are 3.3V compatible, PLL based clock driver devices targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC950 is
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BR1333
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MPC950/D
AN1091
MPC951
DSA0038473
Nippon capacitors
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AZ10EL89
Abstract: AZ10EL89D AZ10EL89DR1 AZ10EL89DR2 MC10EL89
Text: ARIZONA MICROTEK, INC. AZ10EL89 ECL/PECL Coaxial Cable Driver FEATURES • • • • • • 375ps Propagation Delay 1.6V Output Swing Internal Input Pulldown Resistors Operating Range of 4.2V to 5.7V Direct Replacement for ON Semiconductor MC10EL89 Transistor Count = 29 devices
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CTS10
Abstract: No abstract text available
Text: CTS10EL89 PECL/ECL Coaxial Cable Driver SOIC8 Features Block Diagram Direct Replacement for ON Semi MC10EL89 1.6V Output Swing 375ps Propagation Delay Internal Input Pull-down Resistors RoHS Compliant Pb Free Packages Description
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Untitled
Abstract: No abstract text available
Text: MOTOROLA Order this document by MPC950/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver 2 The MPC950 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC950 is ideal for the
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Untitled
Abstract: No abstract text available
Text: MOTOROLA Order this document by MPC951/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver 2 The MPC951 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock tree designs. With output frequencies of up to 180MHz and output skews of 375ps the MPC951 is ideal for the
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AZ10EL89
Abstract: AZ10EL89D MC10EL89
Text: ARIZONA MICROTEK, INC. AZ10EL89 ECL/PECL Coaxial Cable Driver FEATURES • • • • • • PACKAGE AVAILABILITY 375ps Propagation Delay PACKAGE PART NUMBER MARKING NOTES 1.6V Output Swing SOIC 8 AZ10EL89D AZM10EL89 1,2 1 Add R1 at end of part number for 7 inch 1K parts , R2 for 13 inch (2.5K parts)
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SY100EL89ZC
Abstract: SY10EL89 SY10EL89ZC
Text: * COAXIAL CABLE DRIVER SYNERGY S EM IC O N D U C TO R FEATURES DESCRIPTION 375ps propagation delay 1-6V output swings The SY10EL89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially useful in Digital Video Broadcast applications. For this
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Untitled
Abstract: No abstract text available
Text: * SYNERGY SEMICONDUCTOR CO AXIA L CABL E DRIVER SY10EL89 DESCRIPTION FEATURES • 375ps propagation delay ■ 1.6V output swings ■ Internal 75Ki2 input pull-down resistors ■ ESD protection of 2000V ■ Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM
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000E-12
Abstract: SY10EL89 SY10EL89ZC SY10EL89ZCTR
Text: SYNERGY COAXIAL CABLE DRIVER SY10EL89 SEMICONDUCTOR FEATURES DESCRIPTION 375ps propagation delay The SY 10E L89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially useful in Digital Video B roadcast applications. For this
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low V o ltag e PLL C lock D river M PC950 MPC951 The M PC950/951 are 3 .3V com patible, PLL based clock driver d evices ta rg e te d fo r high p erform ance clock tree designs. W ith output frequencies of up to 180M H z and output skew s of 375ps th e M P C 950 is
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MPC951FA
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BR1333
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Untitled
Abstract: No abstract text available
Text: * SYNERGY COAXIAL CABLE DRIVER SY10EL89 SEMICONDUCTOR DESCRIPTION FEATURES • 375ps propagation delay ■ 1.6V output swings ■ Internal 75K£2 input pull-down resistors ■ ESD protection of 2000V ■ Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM
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Untitled
Abstract: No abstract text available
Text: * SYNERGY COAXIAL CABLE DRIVER SY10EL89 SEMICONDUCTOR DESCRIPTION FEATURES • 375ps propagation delay ■ 1.6V output swings ■ Internal 75K£2 input pull-down resistors ■ ESD protection of 2000V ■ Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM
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Untitled
Abstract: No abstract text available
Text: *SYNERGY COAXIAL CABLE DRIVER PRELIMINARY SY10EL89 SEMICONDUCTOR DESCRIPTION FEATURES 375ps propagation delay The SV10EL89 is a differential fanout gate specifically designed to drive coaxial cables. The device is especially useful in Digital Video Broadcast applications. For this
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Untitled
Abstract: No abstract text available
Text: *SYNERGY C O A X IA L CA BLE DRIVER SY10EL89 SEMICONDUCTOR FEATURES • ■ 375ps propagation delay DESCRIPTION T he S Y 10E L89 is a differential fanout gate sp e cifica lly designed to drive coaxial cables. The device is especially useful in D igital Video B roadcast applications. For this
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Untitled
Abstract: No abstract text available
Text: SYN ER G Y COAXIAL C A B L E D3IVEH V 10 E L 8 9 S E M IC O N D U C TO R FEATURES • 375ps propagation delay ■ 1.6V output swings ■ Internal 75KQ input pull-down resistors ■ ESD protection of 2000V ■ Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM
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