2B443FL2 Search Results

DDU-6-10

Abstract: DDU-6-12 DDU-6-16 DDU-6-20 DDU-6-30 DDU-6-35 DDU-6-40 DDU-6-45 DDU-6-50 DDU-6-60
Contextual Info: DATA DELAY DEVICES INC 53E D • 2b443fl2 000DS4b S ■ 7 Z' V 7 “ / 3 Digital Delay Units SERIES: DDU-6 T2L Interfaced, 5 Outputs 14 pin DIP Features: ■ ■ ■ ■ Low Cost. Completely interfaced for TTL. Low profile. Fits standard 14 pins DIP socket.

manchester

Abstract: manchester decoder T 1553 MAD-8783 MAE-8782
Contextual Info: BATA DELA Y D E V I C E S INC b3E D • 2b443fl2 □ □ □ □ ‘Ì70 ESfl ■ DDD 1553 Manchester Coders s e rie s : MAE-8782 Encoder MAD-8783 Decoder 20 mbaud Specifications: ■ Completely TTL buffered. ■ Operating temperature: 0“C to 70°C (-55*C to

Contextual Info: iasi Logic Digital Delay Units SERIES: 10 Taps 14 pins DIP TTL Interfaced DDU-7F deteyW data y » » devicesYinc. Features: • ■ ■ ■ ■ Test Conditions: Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space econom y achieved

PDU-13256F-1

Abstract: PDU-13256F-2 PDU-13256F-3 PDU-13256F-4 PDU-13256F-5 PDU-13256F-6 PDU-13256F-7 PDU-13256F-8 PDU-13256F-9
Contextual Info: Digitally Programmable data delayNo Delay Units SERIES: P D U -1 3256F . devices? _ _ . 8-Bit TTL Interfaced >«-. Test Conditions: Specifications: • Delay variation: Monotonic in one direction. ■ Input pulse-width: ■ Programmed delay tolerance: ±5% or

3D7303

Contextual Info: 3D7303 MONOLITHIC TRIPLE FIXED DELAY LINE SERIES 3D7303 data Gc^v) delay devices,vinc. FEATURES PACKAGES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

mad85-10

Contextual Info: mchester Decoder SERIES: MAD-85 14 pins DIP TTL Interfaced data Vjga delay \q devices^mi e. Features: • TTL input & outputs. ■ 14 pins DIP. ■ Data Rates to 25 MB/S. ■ Self Syncronizing within one BIT time. A pp licatio n : ■ Local Area Network LAN interfaces.

Contextual Info: 3D7502 data delay devices;inc. MONOLITHIC MANCHESTER DECODER SERIES 3D7502 PACKAGES FEATURES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

Contextual Info: 3D7010 data devices, . MONOLITHIC 10-TAP FIXED DELAY LINE SERIES 3D7010 PACKAGES FEATURES All-silicon, low-power CMOS technology* TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP package) Low ground bounce noise

3D7005

Abstract: 3D7005-25 3D7005-30 3D7005-35 74LS SOIC300mil
Contextual Info: DATA DELAY DEVICES INC b 3E D 5b443fl2 O Q D t n A b 354 DDD All Silicon Delay Line SERIES: 3D7005 5 Taps DESCRIPTION PIN DESCRIPTION The 3D7000* series delay line is a completely silicon delay line, which features unique circuits to compensate for temperature and power supply variations. It offers 5

1T311

Abstract: 15F4
Contextual Info: data t o delayW devices;,.^ EFasf L o g ic Programmable Delay Units SERIES: PDU-15F 5 Bit TTL Interfaced Specifications: Features: Supply current: Icch = 70 • Propagation delay: Address to output (T su a ) = 7 ns typ. Enable to output (Tsue) = 6 ns typ.

Contextual Info: HCM OS — Logic Surface Mounted SERIES: SMD-99C Delay Line 5 Outputs • Designed for surface mounting. ■ Low profile .1 7 5 max. height. ■ Com pletely interfaced HCMOS. Specifications: ■ No. Taps: 5 equally spaced taps. Total delay tolerance: ± 5% or 2 ns whichever is greater.

Contextual Info: 3D7110 data QJO delay devices,!., MONOLITHIC 10-TAP FIXED DELAY LINE SERIES 3D7110 PACKAGES FEATURES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

PDU-1064H-1

Abstract: PDU-1064H-10 PDU-1064H-2 PDU-1064H-3 PDU-1064H-4 PDU-1064H-5 PDU-1064H-6 PDU-1064H-8 T-S00
Contextual Info: Digitally Programmable Dclsy Units series: PDU-1064H 9 6-Bit E C L Interfaced Features: Low propagation delay ln p u t& output ECL buffered 6-B IT ECL program m able delay line Output sam e polarity of input Com pletely interfaced C om pact& low profile

Contextual Info: data delay devices;me. zFast Logic Delayed Pulse Generator SERIES: T2L Interfaced 8 pin DIP DPG-41 Features: • ■ ■ ■ Low Cost. Completely interfaced for TTL. Low profile. Fits standard 8 pins DIP socket. Specifications: ■ ■ ■ ■ ■ ■ ■

Contextual Info: daiaV^V ddayW devices;inc. H CM O S-Logic Digital Delay Units SERIES: 5 Outputs 14 pins DIP DDU-4C ; Features: • ■ ■ ■ ■ Completely interfaced for CMOS. No external components required. P.C. board space economy achieved. Low profile. Fits standard 14 pins DIP socket.