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Teledyne e2v CY7C466A-25LMB MEMORY, 64K X 9 CASCADABLE FIFO, 25 NS A - Rail/Tube (Alt: CY7C466A-25LMB)
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Avnet Americas	CY7C466A-25LMB	Tube			250	1 - 10 - 100 - 1000 - 10000 -	Get Quote
Teledyne e2v CY7C245A-25LMB PROM, ONE TIME, 2K X 8, REGISTERED, 25 N - Rail/Tube (Alt: CY7C245A-25LMB)
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Avnet Americas	CY7C245A-25LMB	Tube			250	1 - 10 - 100 - 1000 - 10000 -	Get Quote
Teledyne e2v QP7C198-25LMB STATIC RAM, 32K X 8, WITH OUTPUT ENABLE, - Rail/Tube (Alt: QP7C198-25LMB)
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Avnet Americas	QP7C198-25LMB	Tube			250	1 - 10 - 100 - 1000 - 10000 -	Get Quote
Teledyne e2v CY7C261-25LMB PROM, 8K X 8, 25 NS ACCESS TIME - Rail/Tube (Alt: CY7C261-25LMB)
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Avnet Americas	CY7C261-25LMB	Tube			250	1 - 10 - 100 - 1000 - 10000 -	Get Quote
Teledyne e2v PLDC20RA10-25LMB PROG. LOGIC DEVICE, ASYNCHRONOUS, 25 NS - Rail/Tube (Alt: PLDC20RA10-25LMB)
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Avnet Americas	PLDC20RA10-25LMB	Tube			250	1 - 10 - 100 - 1000 - 10000 -	Get Quote

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25LMB Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
CY7C187 Abstract: CY7C187A Text: CY7C187A 64K x 1 Static RAM Features provided by an active LOW chip enable CE and three-state drivers. The CY7C187A has an automatic power-down feature, reducing the power consumption by 55% when deselected. • High speed — 20 ns • CMOS for optimum speed/power	Original	PDF	CY7C187A CY7C187A CY7C187
C2665 Abstract: C2668 7c26 C2662 C266 27C64 CY7C266 R1250 C2666 Text: 1CY 7C26 6 CY7C266 8Kx8 Power-Switched and Reprogrammable PROM Features Functional Description • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial)	Original	PDF	CY7C266 CY7C266 600-mil-wide C2665 C2668 7c26 C2662 C266 27C64 R1250 C2666
C401 diode Abstract: 10DC IR transistor 10dc ir C4016 C4019 C401 CY7C401 CY7C402 CY7C403 C4013 Text: CY7C401/CY7C403 CY7C402/CY7C404 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO Features words. Both the CY7C403 and CY7C404 have an output enable OE function. • 64 x 4 (CY7C401 and CY7C403) 64 x 5 (CY7C402 and CY7C404) High-speed first-in first-out memory (FIFO)	Original	PDF	CY7C401/CY7C403 CY7C402/CY7C404 CY7C403 CY7C404 CY7C401 CY7C403) CY7C402 CY7C404) 25-MHz 50-ns C401 diode 10DC IR transistor 10dc ir C4016 C4019 C401 C4013
CY7C128A Abstract: transistor C128 C128A 7C128A-45 7C128A-25 Text: 1CY 7C12 8A CY7C128A 2K x 8 Static RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — 15 ns • Low active power — 440 mW commercial — 550 mW (military) • Low standby power	Original	PDF	CY7C128A CY7C128A transistor C128 C128A 7C128A-45 7C128A-25
CY7C197 Abstract: No abstract text available Text: CY7C197 256Kx1 Static RAM Features vided by an active LOW chip enable CE and three-state drivers. The CY7C197 has an automatic power-down feature, reducing the power consumption by 75% when deselected. • High speed — 12 ns Writing to the device is accomplished when the chip enable	Original	PDF	CY7C197 256Kx1 CY7C197
FT6163 Abstract: No abstract text available Text: FT6163/FT6163L Ultra High Speed 8K x 9 Static Cmos Rams FEATURES Data Retention with 2.0V Supply, 10 µA Typical Current 7163L Military) Common I/O Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved)	Original	PDF	FT6163/FT6163L 28-Pin 25/35ns 25/35/45ns FT6163 FT6163L 728-bit
P4C148 Abstract: P4C149 Text: P4C148, P4C149 ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Two Options – P4C148 Low Power Standby Mode – P4C149 Fast Chip Select Control High Speed Equal Access and Cycle Times – 10/12/15/20/25/35/45/55 ns (Commercial) – 15/20/25/35/45/55 ns (P4C148 Military)	Original	PDF	P4C148, P4C149 P4C148 P4C149 096-bit
P4C150 Abstract: No abstract text available Text: P4C150 ULTRA HIGH SPEED 1K X 4 RESETTABLE STATIC CMOS RAM FEATURES Separate Input and Output Ports Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Fully TTL Compatible Inputs and Outputs	Original	PDF	P4C150 24-Pin 28-Pin P4C150 096-bit requires300 SRAM105
P4C147 Abstract: No abstract text available Text: P4C147 ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Single 5V ± 10% Power Supply High Speed Equal Access and Cycle Times – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Separate Input and Output Ports Three-State Outputs	Original	PDF	P4C147 SRAM103 SRAM103 P4C147 Oct-05
7cl6 Abstract: D-2501 CY7C161A CY7C162 CY7C162A Text: CYPRESS SEMICONDUCTOR 4bE » B SSfl'lbfe.S □ QQbMSb b q c y p CY7C161A CY7C162A • - j/ "— = 16,384 x 4 Static RAV RAM Separate I/O SEMICONDUCTOR Features • Automatic power-down when dese lected • Transparent write 7C161A • CMOS for optimum speed/power	OCR Scan	PDF	CY7C161A CY7C162A 7C161A) CY7C162 au62A-35DMB CY7C162Aâ 35KMB CY7C162A-35LMB CY7C162A-45DMB 7cl6 D-2501 CY7C162A
CY7C263-35PC Abstract: 7C261 CY7C263 CY7C26345DMB cerdip z PACKAGE 7C264 C261 CY7C261 CY7C264 f1b0 Text: CY7C261 CY7C263/CY7C264 CYPRESS Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial) — 770 m\V (military) • Super low standby power (7C261)	OCR Scan	PDF	CY7C261 C263/CY7C264 7C261) 300-mil 600-mil CY7C261, CY7C263, CY7C264 8192-word byGY7C264 CY7C263-35PC 7C261 CY7C263 CY7C26345DMB cerdip z PACKAGE 7C264 C261 f1b0
tle 6261 g Abstract: AoL-12L S-108 SEM 238 TLE TSOP CY7B144 CY7B145 B08L Text: 4bE D CYPRESS SEMICONDUCTOR • ESfi^bbS 00ab3SG 2 E3CYP 'T-% -Zl> -\ Z_ PRELIMINARY & CYPRESS ill — ^ s ? SEMICONDUCTOR 8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features Functional Description • 0.8-mlcron BiCMOS for high per formance • High-speed access	OCR Scan	PDF	CY7B144 CY7B145 68-pin CY7B145 G00b403 T-46-23-12 38-00163-B tle 6261 g AoL-12L S-108 SEM 238 TLE TSOP B08L
7C192-12 Abstract: 7C192-15 7C192-20 A10C CY7C191 CY7C192 CY7C192-25PC Text: MbE D CYPRESS SEMICON DUC TOR B 250^fc,b2 OOQfc.1,42 3 E 3 C Y P CY7C191 CY7C192 CYPRESS SEMICONDUCTOR Features • Automatic power-down when deselected • Transparent write 7C19X • CMOS for optimum speed/power • H ighspeed — tM = 25 ns • Low active power	OCR Scan	PDF	CY7C191 CY7C192 7C19X) TheCY7C191 CY7C192 CY7C192-45VC CY7C192-45DMB CY7C192-45KMB CY7C192â 45LMB 7C192-12 7C192-15 7C192-20 A10C CY7C192-25PC
c46cm Abstract: CY7C460 CY7C462 CY7C464 IDT7205 IDT7206 Text: CY7C460 CY7C462 CY7C464 m .W C Y P R E S S C ascadable 8 K x 9 F I F O C ascadable 16K x 9 FIFO C ascadable 3 2 K x 9 FIFO Features • • • • • • • • • • • • • • • data outputs go to the high-impedance Functional Description state when R is H IG H .	OCR Scan	PDF	CY7C460 CY7C462 CY7C464 CY7C460) CY7C462) CY7C464) 600-mil IDT7205, IDT7206 CY7C460, c46cm CY7C464 IDT7205 IDT7206

7C192-12 Abstract: 7C192-15 A10C CY7C191 CY7C192 CY7C192-25PC Text: CY7C191 CY7C192 ir CYPRESS 64K x 4 Static RAM with Separate I/O Features Functional Description • High speed T he CY7C191 and CY7C192 are high perform ance CM OS static RAM s orga nized as 65,536 x 4 bits with separate I/O. Easy m em ory expansion isprovided by ac	OCR Scan	PDF	CY7C191 CY7C192 CY7C191) CY7C192 38-00076-J tAW15! tADvI15! 7C192-12 7C192-15 A10C CY7C192-25PC
7C168A Abstract: CY7C168A CY7C169A 7C168 CY7C168A-25LMB Text: CYPRESS SEM ICOND UC TO R MhE D ^ B 250^2 GODbSlM 5 O C V P ,7 ^ CY7C168A CY7C169A <VH 'V? -O 2> CYPRESS SEMICONDUCTOR Features Automatic pow er-dow n when dese lected 7C168A CMOS for optimum speed/power High speed — U a = 15 n s — tACE = 10ns(7C169A)	OCR Scan	PDF	CY7C168A CY7C169A 7C168A) 7C169A) 7C168) 2001Velectrostatic CY7C168A CY7C169A CY7CI68Ahas CY7C169A-45FMB 7C168A 7C168 CY7C168A-25LMB
L496D Abstract: 9l reset CY7C331 ST L11922 0423-J Text: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,	OCR Scan	PDF	CY7C331 28-pin CY7C331 -40TMB 28-Lead CY7C331â 40WMB 28-Lead 300-Mil) L496D 9l reset ST L11922 0423-J
AB26S Abstract: 7C109A CY7C109 CY7C109A Text: CY7C109A PRELIMINARY l ^wSSQBBSf S S ySSt Ì p YJe JkP XRI- XjiïJF ^ 128KX 8 Static RAM Features Functional Description • H ighspeed The CY7C109A is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable	OCR Scan	PDF	CY7C109A 128Kx CY7C109A AB26S 7C109A CY7C109
CY7C197 Abstract: CV7C197 Text: MbE D n " T CYPRESS SEMICONDUCTOR Features Automatic power-down when deselected CMOS for optimum speed/power Highspeed — 20ns Low active power — 880 mW Low standlgr power — 220 mW TlX-compatible imputs and outputs Capable ofwithstanding greater than	OCR Scan	PDF	CY7C197 2001Velectrostatic CY7C197 CY7C197-45LC CY7C197-45PC CY7C197-45VC CY7C197-45DMB CY7C197-45KMB CY7C197-45LMB CV7C197
CY7C1009 Abstract: 7C1009 A14C Text: PRELIMINARY r y f\|pPA RJL- lrP Anni I CY7C1009 128Kx 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW The CY7C1009 is a high-performance	OCR Scan	PDF	CY7C1009 550-mil CY7C1009 7C1009 A14C
automaticpower change over switch circuit diagram Abstract: CY7C185 CY7C185A Text: CY7C185A '* C YPRESS 8K x 8 Static RAM Features Functional D escription • High speed — 20 ns • CMOS for optimum speed/power T he CY7C185A is a high-perform ance CMOS static RA M organized as 8192 words by 8 bits. Easy mem ory expansion is provided by an active LO W chip enable	OCR Scan	PDF	CY7C185A CY7C185A 300-miMilitary CY7C185Aâ 25LMB 28-Pin 35DMB 28-Lead automaticpower change over switch circuit diagram CY7C185
Untitled Abstract: No abstract text available Text: CY7C171A CY7C172A r^ y p p p cc Features F unctional D escription • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — tAA = 15 ns • Transparent write 7C171A • Low active power — 375 mW • Low standby power	OCR Scan	PDF	CY7C171A CY7C172A 7C171A) 7C171A 7C172A tADvI13)
Untitled Abstract: No abstract text available Text: PRELIMINARY SEMCONDUCTOR CY7B138 CY7B139 4K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features Functional Description • 0.8-micron BiCMOS for high per formance • High-speed access — 15 ns com’l — 25 ns (mil) • Automatic power-down • Fully asynchronous operation	OCR Scan	PDF	CY7B138 CY7B139 68-pin CY7B138 CY7B139
Untitled Abstract: No abstract text available Text: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin	OCR Scan	PDF	28-pin 28-pin termW22 28-Lead 300-Mil) CY7C331 001305b

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Teledyne e2v CY7C466A-25LMB

Teledyne e2v CY7C245A-25LMB

Teledyne e2v QP7C198-25LMB

Teledyne e2v CY7C261-25LMB

Teledyne e2v PLDC20RA10-25LMB

25LMB Datasheets Context Search

CY7C187

C2665

C401 diode

CY7C128A

CY7C197

FT6163

P4C148

P4C150

P4C147

7cl6

CY7C263-35PC

tle 6261 g

7C192-12

c46cm

7C192-12

7C168A

L496D

AB26S

CY7C197

CY7C1009

automaticpower change over switch circuit diagram

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