25CLQ Search Results

Contextual Info: I , ,• I P D -2.352C In te rn a tio n a l IO R Rectifier 20CLQ045 p r e l im in a r y SCHOTTKY RECTIFIER 20 Amp D e s cip tio n /F e a tu re s M a jo r R a tin g s a n d C h a ra c te ris tic s 25CLQ 045 U n its 20 A 45 V 250 A Mi @ 10Apk, T j = 125°C Per Leg

2f smd transistor

Abstract: smd 2f 20CLQ045
Contextual Info: PD - 20352D 20CLQ045 SCHOTTKY RECTIFIER 20 Amp Desciption/Features Major Ratings and Characteristics Characteristics 25CLQ045 Units IF AV Rectangular waveform 20 A VRRM 45 V IFSM @ tp = 8.3ms sine 250 A VF @ 10Apk, T J = 125°C (Per Leg) 0.48 V TJ, Tstg Operating and storage -55 to 150

Contextual Info: PD - 20352D International IGR Rectifier 20CLQ045 SCHOTTKY RECTIFIER 20 Amp Desciption/Features Major Ratings and Characteristics Characteristics 25CLQ045 Units 20 A 45 V Ifs m @ tp = 8.3ms sine 250 A VF @ 10Apk, T j = 125°C 0.48 V -55 to 150 °C If a v Rectangular

smd 2f

Abstract: 20CLQ045
Contextual Info: PD - 2.352C PRELIMINARY SCHOTTKY RECTIFIER 20 Amp Desciption/Features Major Ratings and Characteristics Characteristics 20CLQ045 25CLQ045 Units IF AV Rectangular waveform 20 A VRRM 45 V I FSM @ tp = 8.3ms sine 250 A VF @ 10Apk, T J = 125°C (Per Leg) 0.48

smd CAw

Contextual Info: I , Interna tional I PD - 2.352C I 6 R Rectifier p r e lim in a r y SCHOTTKY RECTIFIER 20 Amp Desciption/Features M ajor Ratings and Characteristics 25CLQD45 Units lp AV Rectangular waveform 20 A V rrm 45 V Ipsm@ tp = 8.3ms sine 250 A Characteristics @ 10Apk, T j = 125 °C

CLC417

Abstract: MM5105 S-60 VUU12 MM4105 Scans-00433
Contextual Info: o r" IO S 2 v. Dynamic Shift Registers DOS io o 5 M M 4 1 0 5 /M M 5 1 0 5 quad 6 4 -b it dyn am ic s h ift re g is te r/a c c u m u la to r S S general description The M M 4 1 0 5 /M M 5 t0 S quad 6 4 -b it d y n a m ic s h ift re g is te r/a c c u m u la to r is a m o n o lith ic MOS m te

MM5081

Abstract: CLC417 CLC730036 OA-18 S-60
Contextual Info: M M 5081 DOS Dynamic Shift Registers M M 5 0 8 1 10 -b it serial in -p aralle l out lam p d rive r/reg ister general description T h e M M 5 0 8 1 is a 10-b it serial in -p a ra lle l o u t static s h ift re gister. It is a m o n o lith ic M O S P-channel

CLC417

Abstract: CLC730036 MM1103 OA-18 S-60
Contextual Info: M M 1103 DO S RAMs M M 1 1 0 3 1 0 2 4 b it fully decoded d yn am ic random access re a d /w rite m em ory general description T^ M M H Q jf u lly d e c o d e d d y n a m ic .lQ 2 4 _ w o r c t- - ' R e fre s h c y c le f S * . 1 -b i t p e r w o r a r e a d / w r it e r a n d o m access m e m o r y

mod 8 ring counter using JK flip flop

Abstract: MM580 MM581 IMM480 MM481 MM482 monolithic amplifiers
Contextual Info: M M 4 8 0 / M M 5 8 0 . M M 4 8 1 /M M 5 8 1 . M M 4 8 2 / M M 5 8 2 , M M 4 8 3 / M M 5 8 3 DOS Logic Elements M M 4 8 0 / M M 5 8 0 series M O S logic e le m e n ts general description N a tio n a l’s lin e o f m o n o lith ic MOS gates and flip flo p s are b u ilt u tiliz in g P channel enhancem ent

MM5260

Contextual Info: o <0 CM IO RAM DOS S 2 M M 5 2 6 0 1 0 2 4 -b it fu lly decoded dyn am ic random access m em ory general description The MM5260 fu lly decoded dynamic 1024 word x 1-bit word read/write random access memory is a m on olith ic MOS^integrated circuit using silicon

CLC417

Abstract: CLC730036 MM4012 OA-18 S-60 LTMI MM5012
Contextual Info: M M 4 0 1 2 /M M 5 0 1 2 Dynamic S hift Registers N S M M 4 0 1 2 /M M 5 0 1 2 dual 2 5 6 -b it dynam ic shift register general description T h e M M 4 0 1 2 /M M 5 0 1 2 dual 2 5 6 -b it d y n a m ic s h ift W ide fre q u e n c y range register is a m o n o lith ic M O S in te g ra te d c irc u it

LM351 data sheet

Abstract: LM351 op amp dm7800 dm8800 LM351 MH0025 LM7541A MH0007 dc to ac Inverter evaluation board LM351 pin diagram
Contextual Info: M H 0027C NS Clock Drivers M H 0 0 2 7 C dual high speed M O S in te rfa c e driver general description The M H 0 0 2 7 C is a d u a l h igh c u rre n t a ctive p u ll-u p designed to operate w ith a h igh c u rre n t sin k such as th e D H 0 0 3 4 o r L M 7 5 4 1 A and thus provides fu lly

MM4018

Abstract: CLC417 CLC730036 MM5018 S-60
Contextual Info: M M 4018/M M 5018 DOS Dynamic Shift Registers M M 4 0 1 8 / M M 5 0 1 8 triple 6 4 -b it d yn a m ic sh ift register general description T h e M M 4 0 1 8 /M M 5 0 1 8 tr ip le 6 4 rb it d y n a m ic s h ift reg ister is a m o n o lith ic MOS in te g ra te d c irc u it

MM5020

Abstract: MM4020 MM4021 MM5021 LT8030
Contextual Info: M M 4 0 2 0 /M M 5 0 2 0 , M M 4 0 2 1 /M M 5 0 2 1 DÛS Dynamic S hift Register; M M 4 0 2 0 /M M 5 0 2 0 quad 8 0 -b it dynamic shift register M M 4 0 2 1 /M M 5 0 2 1 triple 8 0 -b it dynamic shift register general description The MM 4020/MM5020. and MM4021/MM5021