256KWORD Search Results

S05V

Contextual Info: ESI IS27HC020 262,144 X 8 HIGH-SPEED CMOS EPROM NOVEMBER 1997 FEATURES DESCRIPTION • Fast read access time: 45 ns The lS S I IS27HC020 is an ultra-high-speed 2 megabit 256Kword by 8-bit CMOS Programmable Read-Only Memory. This superior random access capability results from a focused

Contextual Info: ESI IS27HC020 262,144 x 8 HIGH-SPEED CMOS EPROM ADVANCE INFORMATION SEPTEMBER 1997 FEATURES DESCRIPTION • Fast read access time: 45 ns The lS S I IS27HC020 is an ultra-high-speed 2 megabit 256Kword by 8-bit Ultraviolet Erasable CMOS Programmable Read-Only Memory. This superior random access capability

SL821

Contextual Info: HB66A2561 6C-25 524,288W ordX8bit /2 6 2 ,144W o rd X 16bit High Density CM OS Static RAM Card H IT A C H I Rev.o sep.10,1992 The HB66A25616C-25 is a high density 512kWord X 8bit or 256kWord X 16bit static RAM Card, mounted of 4pieces 1M static RAM sealed in TSOP package.

Contextual Info: H B 6 6 A 2 5 6 1 6 C A -2 5 5 2 4 ,2 8 8 W o rd X 8b it /2 6 2 ,1 4 4 W o rd X 1 6 b it High Density C M O S Static RAM Card Rev.O H IT A C H I sep.10,1992 The HB66A25616CA-25 is a high density 512kWordX 8bit or 256kWordX 16bit static RAM Card, mounted of 4pieces 1M static RAM sealed in TSOP package.

IS27C020

Contextual Info: ESI IS27C020 262,144 X 8 HIGH-SPEED CMOS EPROM NOVEMBER 1997 FEATURES DESCRIPTION • Fast read access time: 90 ns The lS S I IS27C020 is an ultra-high-speed 2 megabit 256Kword by 8-bit CMOS Programmable Read-Only Memory. This superior random access capability results from a focused

IS27C020-90T

Abstract: IS27C020 IS27C020-12PL
Contextual Info: IS27C020 262,144 X 8 HIGH-SPEED CMOS EPROM PRELIMINARY JULY 1996 FEATURES DESCRIPTION • Fast read access time: 70 ns The ISSIIS27C020 is an ultra-high-speed 2 megabit 256Kword by 8-bit Ultraviolet Erasable CMOS Programmable Read-Only Memory. This superior random access capability

Contextual Info: ISSI IS27HC020 262,144 X 8 HIGH-SPEED CMOS EPROM NOVEMBER 1997 FEATURES DESCRIPTION • Fast read access time: 45 ns T h e /5 5 / IS27HC020 is an ultra-high-speed 2 megabit 256Kword by 8-bit CMOS Programmable Read-Only Memory. This superior random access capability results from afocused

ifr 422 H7

Abstract: ifr 422 h6 49 4h10 remote TMS320C54xTM
Contextual Info: TMS320VC5441 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS122A December 1999 – Revised November 2000 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to

Contextual Info: TMS320VC5441 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS122E December 1999 – Revised April 2002 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

TMS320VC5441

Abstract: TMS320VC5441GGU TMS320VC5441PGF
Contextual Info: TMS320VC5441 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS122F December 1999 − Revised October 2008 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

IBM "embedded dram"

Abstract: m5m4v4169 Intel 1103 DRAM Nintendo64 IBM98 toshiba fet databook dynamic memory controler MOSYS eDRAM "1t-sram" MoSys
Contextual Info: ABSTRACT MODERN DRAM ARCHITECTURES by Brian Thomas Davis Co-Chair: Assistant Professor Bruce Jacob Co-Chair: Professor Trevor Mudge Dynamic Random Access Memories DRAM are the dominant solid-state memory devices used for primary memories in the ubiquitous microprocessor systems of

ande RY 192

Abstract: ande RY 228 ande RY 227 mov rdn 240 DB14-000121-00
Contextual Info: LSI402Z Digital Signal Processor User’s Guide May 2000 Order Number R14014 LSI Logic Confidential This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

Contextual Info: TMS320VC5420 FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SPRS080F − MARCH 1999 − REVISED OCTOBER 2008 D 200-MIPS Dual-Core DSP Consisting of Two D D D D D D D D D D D D D Independent Subsystems Each Core Has an Advanced Multibus Architecture With Three Separate 16-Bit

Contextual Info: TMS320VC5441 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS122F December 1999 − Revised October 2008 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: HM6207/HM6207H Series 1-Bit CMOS Static RAM 262144-Word x 1-Bit High Speed CMOS Static RAM The Hitachi HM6207 and HM6207H are high speed 256k static RAMs organized as 256-kword x t-b it. They realize high speed access tim e 25/35/45ns and low power consumption,

Contextual Info: in te l A28F400BX-T/B 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F400BX-T, A28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Optimized High Density Blocked Architecture

TMDSDSK5416

Abstract: ci am 5766 IFR 840
Contextual Info: TMS320VC5420 FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SPRS080E – MARCH 1999 – REVISED APRIL 2001 D 200-MIPS Dual-Core DSP Consisting of Two D D D D D D D D D D D D D Independent Subsystems Each Core Has an Advanced Multibus Architecture With Three Separate 16-Bit

m514262

Abstract: MSM514262 MSM514262-10 MSM514262-70 MSM514262-80 ZIP28-P-400 M5M51426 MSM51426
Contextual Info: O K I Semiconductor MSM5 14262 262,144-Word x 4-Bit Multiport DRAM DESCRIPTION The MSM514262 is a 1-Mbit CMOS m ultiport DRAM com posed of a 262,144-word by 4-bits dynam ic RAM and a 512-words b y 4-bits SAM. Its RAM and SAM operate independently and asynchronously.

DP 704c

Abstract: T32768 6132 SRAM DP- 704C GPL169256UA 19INT
Contextual Info: GPL169256UA 16-Bit LCD Controller with 2368 Dots Driver and USB Interface AUG. 21, 2009 Version 1.0 GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. TECHNOLOGY INC. is believed to be accurate and reliable. Information provided by GENERALPLUS

GPF16256B

Abstract: PY0030A GPF16 16256B
Contextual Info: GPF16256B 16-CHANNEL MIDI SYNTHESIZER WITH 256K X 16 ROM MAY 10, 2007 Version 1.2 GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. TECHNOLOGY INC. is believed to be accurate and reliable. Information provided by GENERALPLUS

GPCE512A

Abstract: 0029B IOA12 gpy0029b
Contextual Info: GPCE512A SOUND CONTROLLER WITH 256 K x 16 MASK ROM Sep 15, 2009 Version 1.5 GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. TECHNOLOGY INC. is believed to be accurate and reliable. Information provided by GENERALPLUS

tms320 54x mcbsp

Contextual Info: TMS320VC5441 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS122F December 1999 − Revised October 2008 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

SMJ320C40

Abstract: SMJ320MCM42C SMJ320MCM42D
Contextual Info: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001 – JULY 1997 D D D D D D D D Performance: – 80 Million Floating-Point Operations Per Second MFLOPS With 496-MBps-Burst I/O Rate for 40-MHz Modules – Zero-Wait-State Local Memory for Each

micron memory sram

Abstract: micron sram MT28C3214P2FL MT28C3214P2NFL FW431
Contextual Info: 2 MEG x 16 PAGE FLASH 256K x 16 SRAM COMBO MEMORY FLASH AND SRAM COMBO MEMORY MT28C3214P2FL MT28C3214P2NFL Low Voltage, Extended Temperature FEATURES BALL ASSIGNMENT 66-Ball FBGA Top View • Flexible dual-bank architecture • Support for true concurrent operations with no