2-BIT AND GATE Search Results

Contextual Info: MULTIFUNCTION TIMER MFT ST9+/ MULTI-FUNCTIONS TIMER / 1 MFT Main Features 2 Input and 2 Output pins independently configurable 16-bit counter and 8-bit prescaler Up or down counter, external or internal clock 2 Capture/Reload Registers (16-bit) 2 Compare Registers (16-bit)

M5M81C56P2

Abstract: m5m8
Contextual Info: M ITSUBISHI LSI« M 5 M 8 1 C 5 6 P -2 /F P -2 /J-2 CMOS 2048-BIT STATIC RAM WITH I/O PORTS AND TIM ER DESCRIPTION The M5M81C56P-2 is the 2K-bil RAM 256-word by 8-bit fabricated by the silicon gate CMOS technology. This LSI has 3 I/O ports and a 14-bit counter/timer which make it a

Contextual Info: MITSUBISHI LSIs M 5 M 2 7 C 2 2 K , J K - 1 2 1 ,- 1 5 1 2097152-BIT 131 (J72-WORD BY 16-BIT CMOS ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION The Mitsubishi M5M27C202K, J K - 121, - 151 are high-speed 2 0 9 7 1 5 2 -bit ultraviolet erasable and electrically reprogram­

Contextual Info: in te i 8088 8-BIT HMOS MICROPROCESSOR 8088/ 8088-2 8-Bit Data Bus Interface Byte, Word, and Block Operations 16-Bit Internal Architecture 8-Bit and 16-Bit Signed and Unsigned Arithmetic in Binary or Decimal, Including Multiply and Divide Direct Addressing Capability to 1 Mbyte

Contextual Info: in te i 8088 8-BIT HMOS MICROPROCESSOR 8088/8088-2 8-Bit Data Bus Interface Byte, Word, and Block Operations 16-Bit Internal Architecture 8-Bit and 16-Bit Signed and Unsigned Arithmetic in Binary or Decimal, Including Multiply and Divide Direct Addressing Capability to 1 Mbyte

Contextual Info: 000 ADC-00403 ' ILC DATA DEVICE CORPORATION_ ADC-00404 and 12 BIT 2/u.SEC HYBRIDA/D CONVERTERS Low cost, military, standard pin out FEATURES • 2 fiSEC CONVERSION TIME 12 BIT RESOLUTION AND LINEARITY DESCRIPTION APPLICATIONS The ADC-00403 is a 12 bit 2 m icrosec­

88 printhead

Abstract: printhead S-4680A thermal printhead s4680 seiko 64 s chip printhead driver
Contextual Info: Rev.1.0 64-BIT THERMAL PRINTHEAD DRIVER WITH HEAT HISTORYBASED PRINTHEAD MANAGEMENT AND 2-BIT PARALLEL INPUT S-4680A The S-4680A is a CMOS thermal printhead driver containing two 64-bit shift registers and six latches 3 x 2 . Two-bit parallel data can be input to the

pt1000 msp430 schematic

Abstract: pt500 temperature sensor schematic pt1000 sensor msp430 pt100 pt100 msp430 pt100 temperature sensor schematic msp430 semiconductor sensors msp430 adc temperature sensor schematic msp430 PT100 PT100 bridge adc
Contextual Info: Chapter 2 Analog-to-Digital Converters Topic Page Architecture and Function of the MSP430 14-Bit ADC . . . . . . . . . . . . 2–3 Application Basics for the MSP430 14-Bit ADC . . . . . . . . . . . . . . . . 2–41 Additive Improvement of the MSP430 14-Bit ADC

SSTE32882KA1

Contextual Info: DATASHEET Advanced Information 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation.

am9511A

Abstract: AM9511 FLOATING POINT Co Processor 9511A
Contextual Info: Am9511A Arithmetic Processor Am9511A MILITARY INFORMATION DISTINCTIVE CHARACTERISTICS 2 and 3 MHz operation; fixed point 16-bit and 32-bit operations Floating point 32-bit operations; binary data formats Add, Subtract, Multiply and Divide; trigonometric and

DDR3U

Abstract: SSTE32882 2yn1 DDR3 rdimm pcb layout SSTE32882KA1 DDR3U-1600 da-15 pinout dba1 DDR3 layout DDR3 pcb layout
Contextual Info: DATASHEET Advanced Information 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.25V, 1.35V and 1.5V VDD operation.

ta 8268 ah

Contextual Info: iAPX 88/10 8-BIT HMOS MICROPROCESSOR 8088/8088-2 • 8-Bit Data Bus Interface ■ 8-Bit and 16-Bit Signed and Unsigned Arithmetic in Binary or Decimal, Including Multiply and Divide ■ 16-Bit Internal Architecture ■ Direct Addressing Capability to 1

processor intel 8088

Abstract: intel 8008 cpu CSSK
Contextual Info: 8088 8-BIT HMOS MICROPROCESSOR 8088/ 8088-2 • 8-Bit Data Bus Interface ■ Byte, Word, and Block Operations ■ 16-Bit Internal Architecture ■ 8-Bit and 16-Bit Signed and Unsigned Arithmetic in Binary or Decimal, Including Multiply and Divide ■ Direct Addressing Capability to 1 Mbyte

RT 8206

Abstract: Intel 82072 82072A
Contextual Info: in te i 8206/8206-2 ERROR DETECTION AND CORRECTION UNIT Detects and Corrects All Single Bit Errors • Separate Input and Output Busses— No Timing Strobes Required Detects All Double Bit and Most Multiple Bit Errors ■ Expandable to Handle 80 Bit Memories

instruction set of 8088 microprocessor

Abstract: Hardware and Software Interrupts of 8086 and 8088 8088 microprocessor circuit diagram 8088 microprocessor 8088 opcode sheet internal block diagram of 8088 iAPX 88 Book block diagram of Hardware and Software Interrupts of 8086 and 8088 8284 intel microprocessor architecture 8088 instruction set
Contextual Info: 8088 8-BIT HMOS MICROPROCESSOR 8088 8088-2 Y 8-Bit Data Bus Interface Y Byte Word and Block Operations Y 16-Bit Internal Architecture Y Y Direct Addressing Capability to 1 Mbyte of Memory 8-Bit and 16-Bit Signed and Unsigned Arithmetic in Binary or Decimal

Contextual Info: DATASHEET 1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.35V and 1.5V VDD operation. All inputs are 1.35V and 1.5V CMOS compatible, except the

Contextual Info: QQS ADC-00403 ILC DATA DEVICE CORPORATION_ _ _ and ADC-00404 12 BIT 2/xSEC HYBRIDA/D CONVERTERS — Low cost, military, standard pin out L I FEATURES • 2 uSEC CONVERSION TIME • 12 BIT RESOLUTION AND LINEARITY DESCRIPTION APPLICATIONS The ADC-00403 is a 12 bit 2 microsec­

cK 7201

Abstract: SSTE32882 SSTE32882HLB xlxx transistor DA3 307 qbba1 dba1 DDR3 layout DDR3 pcb layout DDR3L
Contextual Info: DATASHEET 1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock driver with parity is designed for 1.35V and 1.5V VDD operation. All inputs are 1.35V and 1.5V CMOS compatible, except the

TC58NVG1S3BFT00

Abstract: TC58NVG1S3 TC58NVG1S8BFT00 TC58NVG1S3B
Contextual Info: TC58NVG1S3BFT00/TC58NVG1S8BFT00 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 2 GBIT 256M x 8 BIT/128M × 16 BIT CMOS NAND E PROM DESCRIPTION The TC58NVG1SxB is a single 3.3 V 2 Gbit (2,214,592,512 bits) NAND Electrically Erasable and Programmable

Contextual Info: CXP50212/50216 Sony. CMOS 4*bit 1 Chip Microcomputer Description The C X P 5 0 2 1 2 /5 0 2 1 6 features the following vari­ ety of functions. A 4-bit CPU, ROM, RAM, I/O port, 8-bit timer, 8-bit timer/counter, 18-bit time base timer, 8-bit serial I/O , vector interrupt and power on

HC912D60

Abstract: 68hc11a8 X68HC805P18PGMR 68HC05P18 68HC711K4 M68HC705E6PGMR* dip 28 68HC05e6 motorola 68hc711K4 programmer 68HC11L6 68hC711KA2
Contextual Info: SG188/D Rev. 2 Microcontroller Development Tool Configuration and Order Information January, 2001 http://www.mcu.motsps.com Development tool information for: 8-Bit 68HC05, 68HC08, and 68HC11 16-Bit 68HC12 and 68HC16 32-Bit 683XX and M•CORE 68HC05 Development Kits

DDR3 rdimm pcb layout

Abstract: SSTE32882KA1 XLXX SSTE32882 407 MTS controller LX-XX
Contextual Info: DATASHEET Advanced Information SSTE32882KA1 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description application. By disabling unused outputs the power consumption is reduced. This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock

Contextual Info: MITSUBISHI LSIs M5M27C201K,JK-121,-15I 2097152-BIT 262144-WORD BY 8-BIT CMOS ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION The Mitsubishi M5M27C201K, J K - 121,-151 are high-speed 2 0 9 7 1 5 2 -bit ultraviolet erasable and electrically reprogram­

407 MTS controller

Abstract: XLXX JESD8-11A pinout DDR3-1333 DDR3 rdimm pcb layout
Contextual Info: DATASHEET Advanced Information SSTE32882KA1 1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT Description application. By disabling unused outputs the power consumption is reduced. This 28-bit 1:2, or 26-bit 1:2 and 4-bit 1:1, registering clock