OB33LN
Abstract: ProASICPLUS Flash Family FPGAs v3.3
Text: v3.3 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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APA075,
APA150,
APA300
OB33LN
ProASICPLUS Flash Family FPGAs v3.3
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schematic diagram online UPS for high frequency
Abstract: ag19
Text: v3.3 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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APA750
Abstract: GL25 4kx8 sram
Text: v3 .4 PLUS ProASIC TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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Untitled
Abstract: No abstract text available
Text: v3.5 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 Million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-Based CMOS Process
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198kbits
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Untitled
Abstract: No abstract text available
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
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Untitled
Abstract: No abstract text available
Text: Advanced v1.2 ProASICPLUS Military and Aerospace FPGAs Fe a t ur es an d B e ne f i ts High C apaci t y • 300,000 to 1 million System Gates • 72k to 198kbits of Two-Port SRAM • 158 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy • Operates over Full Military Temperature Range –55°C to
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198kbits
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serial-in serial-out parallel-in
Abstract: schematic diagram online UPS RAM256X9AA ProASICPLUS Flash Family FPGAs v3.5
Text: v3.5 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 Million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-Based CMOS Process
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PDF
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APA075,
APA150,
APA300
serial-in serial-out parallel-in
schematic diagram online UPS
RAM256X9AA
ProASICPLUS Flash Family FPGAs v3.5
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gl324
Abstract: 180 nm CMOS standard cell library AMI 198kB ProASICPLUS Flash Family FPGAs v3.2 APA075
Text: v3.2 TM ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
gl324
180 nm CMOS standard cell library AMI
198kB
ProASICPLUS Flash Family FPGAs v3.2
APA075
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JC 201 SC
Abstract: GL324 ProASICPLUS Flash Family FPGAs v3.1
Text: v3.1 TM ProASICPLUS Flash Family FPGAs Fe a t ur es an d B e ne f i ts • 100% Routability and Utilization High C apaci t y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy
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198kbits
JC 201 SC
GL324
ProASICPLUS Flash Family FPGAs v3.1
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schematic diagram UPS ica
Abstract: TBD 234 V12 schematic diagram UPS 600 Power tree CQFP CQFP352 ProASICPLUS Flash Family FPGAs v3.0
Text: Advanced v1.2 ProASICPLUS Military and Aerospace FPGAs Fe a t ur es an d B e ne f i ts High C apaci t y • 300,000 to 1 million System Gates • 72k to 198kbits of Two-Port SRAM • 158 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy • Operates over Full Military Temperature Range –55°C to
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198kbits
schematic diagram UPS ica
TBD 234 V12
schematic diagram UPS 600 Power tree
CQFP
CQFP352
ProASICPLUS Flash Family FPGAs v3.0
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GL324
Abstract: ads pa-600 ups 400 ec
Text: v3.3 TM ProASICPLUS Flash Family FPGAs Fe a t ur es an d B e ne f i ts • 100% Routability and Utilization High C apaci t y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy
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198kbits
GL324
ads pa-600
ups 400 ec
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ACTEL proASIC PLUS
Abstract: RAM256X9SST APA150 FIFO256X9SST ACTEL proASIC PLUS APA450
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
ACTEL proASIC PLUS
RAM256X9SST
APA150
FIFO256X9SST
ACTEL proASIC PLUS APA450
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Untitled
Abstract: No abstract text available
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
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JESD 85
Abstract: 130 nm CMOS standard cell library ST GL25 Core from Libero schematic diagram UPS ica
Text: Advanced v1.1 ProASICPLUS Military and Aerospace FPGAs Fe a t ur es an d B e ne f i ts High C apaci t y • 300,000 to 1 million System Gates • 72k to 198kbits of Two-Port SRAM • 158 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy • Operates over Full Military Temperature Range –55°C to
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198kbits
JESD 85
130 nm CMOS standard cell library ST
GL25
Core from Libero
schematic diagram UPS ica
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schematic diagram ups 600 actel silicon sculptor
Abstract: FLASHPRO LITE GL324 ProASICPLUS Flash Family FPGAs v3.0 W5108 GL25 APA075 APA150 APA300 APA600
Text: v3.0 TM ProASICPLUS Flash Family FPGAs Fe a t ur es an d B e ne f i ts • 100% Routability and Utilization High C apaci t y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy
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198kbits
schematic diagram ups 600 actel silicon sculptor
FLASHPRO LITE
GL324
ProASICPLUS Flash Family FPGAs v3.0
W5108
GL25
APA075
APA150
APA300
APA600
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schematic diagram UPS 600 Power tree
Abstract: schematic diagram ups 600 actel silicon sculptor APA075 APA1000 APA150 APA300 APA450 APA600 APA750 JESD22
Text: v3 .4 PLUS ProASIC TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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198kbits
schematic diagram UPS 600 Power tree
schematic diagram ups 600 actel silicon sculptor
APA075
APA1000
APA150
APA300
APA450
APA600
APA750
JESD22
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p21 transistor
Abstract: PECLR ACTEL proASIC PLUS APA450
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
p21 transistor
PECLR
ACTEL proASIC PLUS APA450
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ACTEL proASIC PLUS
Abstract: ACTEL proASIC PLUS APA450 ProASIC PLUS v0.1
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
ACTEL proASIC PLUS
ACTEL proASIC PLUS APA450
ProASIC PLUS v0.1
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capacitor 104 m30
Abstract: No abstract text available
Text: v3.5 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 Million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-Based CMOS Process
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Untitled
Abstract: No abstract text available
Text: Advanced v0.7 ProASICPLUS Flash Family FPGAs Fe a t ur es an d B e ne f i ts • High Performance, Low Skew, Splitable Global Network • 100% Routability and Utilization High C apaci t y • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM
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198kbits
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Untitled
Abstract: No abstract text available
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
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FBGA 896
Abstract: PLL IC 566 ACTEL FBGA 144 896-Pin ProASICPLUS
Text: Product Brief ProASICPLUS APA Family Fe a t ur es an d B e ne f i ts S ecur e Pr og ram m i ng High C apaci t y • The Industry’s Most Effective Security Key Prevents Read Back of Programming Bit Stream • 150,000 to 1-million System Gates • 36k to198k Bits of Two-Port SRAM
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to198k
64-Bit
5172161PB-1/12
FBGA 896
PLL IC 566
ACTEL FBGA 144
896-Pin
ProASICPLUS
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ACTEL proASIC PLUS APA450
Abstract: Actel APA075 OB33L PQ208A APA075 APA1000 APA150 APA300 APA450 APA600
Text: Automotive Supplement PLUS Automotive-Grade ProASIC Features and Benefits • • • High Capacity • • • • • • • • • 0.22µ 4LM Flash-based CMOS Process Live at Power-Up, Single-Chip Solution No Configuration Device Required Retains Programmed Design during
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32-Bit
ACTEL proASIC PLUS APA450
Actel APA075
OB33L
PQ208A
APA075
APA1000
APA150
APA300
APA450
APA600
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rdl 117-a
Abstract: pa-1000b
Text: A d v a n c e d v O .7 ? TM P r o A S IC ^ F la s h F a m ily F P G A s High Performance, Low Skew, Splitable Global Network 100% Routability and Utilization I/O Schmitt-Trigger Option on Every Input Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate
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OCR Scan
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PDF
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198kbits
rdl 117-a
pa-1000b
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