GDDR
Abstract: K4D553238E-JC33 k4d553238e-jc40
Text: 256M GDDR SDRAM K4D553238E-JC 256Mbit GDDR SDRAM 2M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.3 August 2003 Samsung Electronics reserves the right to change products or specification without notice.
|
Original
|
PDF
|
K4D553238E-JC
256Mbit
32Bit
144-Ball
K4D553238E-JC33/36
15tCK
14tCK
10tCK
GDDR
K4D553238E-JC33
k4d553238e-jc40
|
cke02
Abstract: 100L
Text: ESMT M13S64322A Preliminary Revision History Revision 0.5 May 03, 2007 - Delete BGA ball name of packing dimensions Revision 0.4 (May 14,2002) - Change AC Parameters Revision Rev. 0.3 Rev. 0.4 Version -4 -5 -4 -5 tRC 13 tCK 11 tCK 14 tCK 12 tCK tRP 4 tCK
|
Original
|
PDF
|
M13S64322A
cke02
100L
|
DDR2 x32
Abstract: No abstract text available
Text: 512M GDDR3 SDRAM K4J52324QC-B 512Mbit GDDR3 SDRAM Revision 1.2 September 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
|
Original
|
PDF
|
K4J52324QC-B
512Mbit
DDR2 x32
|
Untitled
Abstract: No abstract text available
Text: 512M GDDR3 SDRAM K4J52324QC-B 512Mbit GDDR3 SDRAM Revision 1.4 March 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
|
Original
|
PDF
|
K4J52324QC-B
512Mbit
|
K4J52324Qc
Abstract: No abstract text available
Text: 512M GDDR3 SDRAM K4J52324QC 512Mbit GDDR3 SDRAM Revision 1.5 June 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
|
Original
|
PDF
|
K4J52324QC
512Mbit
K4J52324Qc
|
K4D26323RA-GC33
Abstract: GC33 K4D26323AA-GL K4D26323RA-GC K4D26323RA-GC2A K4D26323RA-GC36
Text: * VDD / VDDQ=2.8V * K4D26323RA-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 2.0 January 2003 Samsung Electronics reserves the right to change products or specification without notice.
|
Original
|
PDF
|
K4D26323RA-GC
128Mbit
32Bit
144-Ball
K4D26323RA-GC2A
20tCK
15tCK
22tCK
K4D26323RA-GC33
GC33
K4D26323AA-GL
K4D26323RA-GC
K4D26323RA-GC36
|
DDR RAM 512M
Abstract: K4J52324QC-BC14 Hynix Cross Reference hynix memory h9 ddr2 K4J52324Q K4J52324QC-BJ12 mark t5n gddr3 K4J52324QC-BC20 K4J52324QC-A
Text: 512M GDDR3 SDRAM K4J52324QC-B 512Mbit GDDR3 SDRAM Revision 1.0 March 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
|
Original
|
PDF
|
K4J52324QC-B
512Mbit
DDR RAM 512M
K4J52324QC-BC14
Hynix Cross Reference
hynix memory h9 ddr2
K4J52324Q
K4J52324QC-BJ12
mark t5n
gddr3
K4J52324QC-BC20
K4J52324QC-A
|
K4J10324QD-HC12
Abstract: k4j10324qd-hj1a 32Mx32 K4J10324QDHC12 K4J10324QD gddr3 k4j10324qdhj1a k4j10324qd-hc
Text: Application Application Note Note 32Mx32 GDDR3 900MHz - Compatibility of 900MHz & 1GHz - May, 2008 Product Planning & Application Engineering Team MEMORY DIVISION SAMSUNG ELECTRONICS Co., LTD Product Product Planning Planning & & Application Application Eng.
|
Original
|
PDF
|
32Mx32
900MHz
900MHz/1GHz
K4J10324QD-HJ1A
K4J10324QD-HC12/14
800/700MHz
900MHz
K4J10324QD-HC12
k4j10324qd-hj1a
K4J10324QDHC12
K4J10324QD
gddr3
k4j10324qdhj1a
k4j10324qd-hc
|
Untitled
Abstract: No abstract text available
Text: * VDD / VDDQ=2.8V * K4D26323RA-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.9 August 2002 Samsung Electronics reserves the right to change products or specification without notice.
|
Original
|
PDF
|
K4D26323RA-GC
128Mbit
32Bit
144-Ball
K4D26323RA-GC2A
20tCK
15tCK
22tCK
|
Untitled
Abstract: No abstract text available
Text: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.2 March 2005 Samsung Electronics reserves the right to change products or specification without notice.
|
Original
|
PDF
|
K4D26323QG-GC
128Mbit
32Bit
144-Ball
K4D26323QG-GC22
-GC20
-GC22/25
55tCK
45tCK
|
K4D26323QG-GC22
Abstract: K4D26323QG-GC2A K4D26323QGGC2
Text: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.0 June 2004 Samsung Electronics reserves the right to change products or specification without notice.
|
Original
|
PDF
|
K4D26323QG-GC
128Mbit
32Bit
144-Ball
-GC22/25
55tCK
45tCK
-GC20
K4D26323QG-GC22
K4D26323QG-GC2A
K4D26323QGGC2
|
K4D26323QG-GC22
Abstract: No abstract text available
Text: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM Revision 1.2 March 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
|
Original
|
PDF
|
K4D26323QG-GC
128Mbit
144-Ball
K4D26323QG-GC22
|
Untitled
Abstract: No abstract text available
Text: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.1 November 2004 Samsung Electronics reserves the right to change products or specification without notice.
|
Original
|
PDF
|
K4D26323QG-GC
128Mbit
32Bit
144-Ball
-GC20
-GC22/25
55tCK
45tCK
|
K4J52324QC
Abstract: K4J52324QC-bj11
Text: 512M GDDR3 SDRAM K4J52324QC 512Mbit GDDR3 SDRAM Revision 1.5 June 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
|
Original
|
PDF
|
K4J52324QC
512Mbit
r7/08/13
450KB
K4J52324QC-AC200
K4J52324QC-BC140
K4J52324QC-BC200
K4J52324QC-BJ110
K4J52324QC-BJ120
K4J52324QC-BJ1A0
K4J52324QC
K4J52324QC-bj11
|
|
rmc10
Abstract: No abstract text available
Text: ADE-207-049 HD64961F High-Speed SCSI Bus Controller HSBC Sep. 1991 Rev.O 0 HITACHI Preliminary The HD64961 HSBC (high-speed SCSI bus controller) is a SCSI bus controller that complies with the SCSI-2 specification (Rev. 10) and has a built-in SCSI single-end driver/receiver for easy
|
OCR Scan
|
PDF
|
ADE-207-049
HD64961F
HD64961
24-bit
rmc10
|
Untitled
Abstract: No abstract text available
Text: • Q ö l b ö O Q O Q M D Ö Ö b bHfl ■ ANA A N A LO G D EV ICES □ A N AL OG D E V I C E S INC bSE D . DSP Microcomputer ADSP-2101 1.1 Scope. This specification covers the detail requirements for a monolithic CMOS 16-bit fixed-point DSP microcomputer.
|
OCR Scan
|
PDF
|
ADSP-2101
16-bit
ADSP-2101TG/883B-40
ADSP-2101TG/883B-50
G-68A
ADI-M-1000:
68-Lead
|