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    QL12x16B

    Abstract: ic 236
    Text: Q L12x16B WildCat 2000 Very-High-Speed 2K 6K Gate CMOS FPGA pASIC HIGHLIGHTS .6000 total available gates, 88 input pins Q Very High Speed - ViaLink metal-to-metal programmable-via anti-fuse technology, allows counter speeds over 150 MHz and logic cell delays of


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    PDF L12x16B 12-by-16array 68and 84-pin 100-pin QL12xl6 16-bit QL12x16B 12xl6B ic 236

    Untitled

    Abstract: No abstract text available
    Text: QLL8x12B and QLL12x16B CMOS FPGAs WildCaX Series Low Power 3.3 Volt Operation ADVANCE DATA 3.3 VOLT pASIC HIGHLIGHTS H B April 1994 High Speed pASIC FPGA Architecture - Enables very highperform ance operation at 3.3 Volts e.g. data path speed up to 80 M Hz


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    PDF QLL8x12B QLL12x16B 12xl6B

    Untitled

    Abstract: No abstract text available
    Text: QL12x16B W ildCat 2000 Very-High-Speed 2K 6K Gate CMOS FPGA pASIC HIGHLIGHTS Very High Speed - ViaLink metal-to-metal programmable-via anti-fuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns. B High Usable Density - A 12-by-16 array of 192 logic cells provides 6000


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    PDF QL12x16B 12-by-16 68and 84-pin 100-pin 12xl6 12xl6B

    Untitled

    Abstract: No abstract text available
    Text: QL16X24B W ild ca t 4000 Very-High-Speed 4K 12K Gate CMOS FPGA pASIC HIGHLIGHTS .4000 usable gates, 122 input pins Q Very High Speed - ViaLink metal-to-metal program m able-via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.


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    PDF QL16X24B 16-by-24 84-pin 144-pin 169-pin 16-bit 16x24B TGD3030 00G025S

    Untitled

    Abstract: No abstract text available
    Text: QL12x16B WildCat 2000 Yery-High-Speed 2K 6K Gate CMOS FPGA Rev B pASIC HIGHLIGHTS .2000 usable gates, 88 I/O pins Very High Speed - ViaLink metal-to-metal programmable-via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.


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    PDF QL12x16B 12-by-16 68pin 84-pin 100-pinCQFP, 100-pin 100pin 16-bit 12xl6B

    Untitled

    Abstract: No abstract text available
    Text: QL12X16B pASIC 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS . . . 2,000 usable ASIC gates, 88 I/O pins Very High Speed - ViaLink metal-to-metal program m able-via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.


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    PDF QL12X16B 12-by-16 68-pin 84-pin 100-pin 16-bit 12x16B PF100 M/883C