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    1238H Search Results

    1238H Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    68021-238HLF Amphenol Communications Solutions BergStik®, Board to Board connector, Unshrouded Right Angled Header, Through Hole, Double Row, 38 Positions, 2.54 mm (0.100in) Pitch. Visit Amphenol Communications Solutions
    SF Impression Pixel

    1238H Price and Stock

    Panduit Corp P12-38HDR-D

    CONN RING CIRC 12-16AWG #3/8
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    DigiKey P12-38HDR-D Bulk 1,284 1
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    Avnet Americas P12-38HDR-D Bulk 23 Weeks, 5 Days 1
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    P12-38HDR-D Bulk 8 Weeks 500
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    Mouser Electronics P12-38HDR-D 674
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    Newark P12-38HDR-D Bulk 22 1
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    RS P12-38HDR-D Bulk 500
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    Interstate Connecting Components P12-38HDR-D 37
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    Jamicon Corporation STW12-38HG

    1.25 MM W TO B CONNECTOR 38P DUA
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    DigiKey STW12-38HG Bulk 1,000 1
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    Mechatronics Fan Group G1238H12B-FSR

    FAN AXIAL 119X38MM 12VDC WIRE
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    DigiKey G1238H12B-FSR Bulk 448 1
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    Interstate Connecting Components G1238H12B-FSR 7
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    Master Electronics G1238H12B-FSR 38
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    Mechatronics Fan Group MS1238H24B1-6-FHR

    FAN AXIAL 120X38MM 24VDC WIRE
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    DigiKey MS1238H24B1-6-FHR Bulk 221 1
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    Mechatronics Fan Group MQ1238H12B-FSR

    FAN AXIAL 120X38MM 12VDC WIRE
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    DigiKey MQ1238H12B-FSR Bulk 215 1
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    Find more 1238H price and stock on Findchips.com

    1238H Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: Features Datasheet RX64M Group Renesas MCUs R01DS0173EJ0100 Rev.1.00 Jul 31, 2014 120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory, 512-KB SRAM, various communications interfaces including IEEE 1588-compliant Ethernet MAC, full-speed USB 2.0 with battery charging, SD host interface optional , quad SPI, and CAN, 12-bit A/D


    Original     		PDF RX64M R01DS0173EJ0100 120-MHz 32-bit 512-KB 1588-compliant 12-bit PLQP0176KB-A PLQP0144KA-A PLQP0100KB-A

    Untitled

    Abstract: No abstract text available
    Text: Datasheet RX62T Group Renesas MCUs R01DS0096EJ0100 Rev.1.00 Apr 20, 2011 100-MHz 32-bit RX MCUs, FPU, 165 DMIPS, 12-bit ADC 3 S/H circuits, double data register, amplifier, comparator : two units, 10-bit ADC one unit, the three ADC units are capable of simultaneous 7-ch. sampling, 100-MHz PWM (two three-phase complementary


    Original     		PDF RX62T R01DS0096EJ0100 100-MHz 32-bit 12-bit 10-bit IEEE-754

    R01US0032EJ

    Abstract: No abstract text available
    Text: User’s Manual 32 Cover RX63T Group User’s Manual: Hardware RENESAS 32-Bit MCU RX Family / RX600 Series All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by


    Original     		PDF RX63T 32-Bit RX600 R01UH0238EJ0210 R01US0032EJ

    CGR18650

    Abstract: DK226A-32U FD-05HG-5661 YMF715B-S FD-05hg MF355H TX34D NM2160 teac FD 3.5 P6300
    Text: T E C H N I C A L S P E C I F I C A T I O N & F E A T U R E S O F P 6 3 0 0 4 Technical Specification & Features of P6300 Enjoy operating P6300 via staring with the detailed specification inside. This chapter includes specification about: • Main system • Accessories and devices


    Original     		PDF P6300 P6300 P6300, P55CLM, CGR18650 DK226A-32U FD-05HG-5661 YMF715B-S FD-05hg MF355H TX34D NM2160 teac FD 3.5

    Untitled

    Abstract: No abstract text available
    Text: TMS320C6000 CPU and Instruction Set Reference Guide Literature Number: SPRU189F October 2000 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest


    Original     		PDF TMS320C6000 SPRU189F TMS320C62x TMS320C67x Index-11

    TLCS-90

    Abstract: BC001 tlcs90 HL008 HL123 40p03 TLCS-900 a55H tlcs-90 cpu xor 1237h
    Text: TLCS-900/L1 CPU 900, 900/L, 900/H, 900/L1, 900/H2 CPUコアの違いについて TLCS-900ファミリにはCPUコアとして① 900, ② 900/L, ③ 900/H, ④ 900/L1, ⑤ 900/H2の5種の CPUコアがあり、それぞれ表1に示す点が異なります。


    Original     		PDF TLCS-900/L1 900/L, 900/H, 900/L1, 900/H2CPU TLCS-900 900/H25 TLCS-90 BC001 tlcs90 HL008 HL123 40p03 TLCS-900 a55H tlcs-90 cpu xor 1237h

    HTR resistors

    Abstract: 80960 80960SA reference i960 RP Processor 80960JF STT 433 1250H clock generator in dual core processor i960 Cx Instruction Set Quick Reference i960 Cx Processor Instruction Set Quick Reference
    Text: i960 RP Microprocessor User’s Manual i960® RP Microprocessor User’s Manual February 1996 Order Number: 272736-001 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for


    Original     		PDF Index-17 Index-18 HTR resistors 80960 80960SA reference i960 RP Processor 80960JF STT 433 1250H clock generator in dual core processor i960 Cx Instruction Set Quick Reference i960 Cx Processor Instruction Set Quick Reference

    80960

    Abstract: BO 620 bbc timer stt 11 c17f i960 Cx Processor Instruction Set Quick Reference i960RP 80960JF 80960RD 80960RP MA11
    Text: i960 Rx I/O Microprocessor Developer’s Manual Release Date: April, 1997 Order Number: 272736-002 The i960® Rx I/O Processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Such errata are


    Original     		PDF sa-26 Index-23 80960 BO 620 bbc timer stt 11 c17f i960 Cx Processor Instruction Set Quick Reference i960RP 80960JF 80960RD 80960RP MA11

    TP-128

    Abstract: No abstract text available
    Text: Features DATASHEET RX63T Group Renesas MCUs R01DS0087EJ0200 Rev.2.00 Mar 11, 2013 100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, Two 12-bit ADCs three S/H circuits, double data registers, amplifier, comparator , one 10-bit ADC, simultaneous sampling on 7 channels using three ADCs, 100 MHz PWM (2 three-phase complementary channels + 4 single-phase


    Original     		PDF RX63T R01DS0087EJ0200 100-MHz 32-bit 12-bit 10-bit IEEE-754 TP-128

    SPRU052

    Abstract: SPRU190 TMS320 125AH 51FFH
    Text: TMS320C62xx CPU and Instruction Set Reference Guide 1997 Digital Signal Processing Solutions Printed in U.S.A., July 1997 D426008-9761 revision A SPRU189B TMS320C62xx CPU and Instruction Set 1997 Reference Guide TMS320C62xx CPU and Instruction Set Reference Guide


    Original     		PDF TMS320C62xx D426008-9761 SPRU189B TMS320C62xx SPRU052 SPRU190 TMS320 125AH 51FFH

    Architecture of TMS320C67X

    Abstract: SPRU190 TMS320 TMS320C6201 tms320c67x font label
    Text: TMS320C62x/C67x CPU and Instruction Set Reference Guide Literature Number: SPRU189C March 1998 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information


    Original     		PDF TMS320C62x/C67x SPRU189C Architecture of TMS320C67X SPRU190 TMS320 TMS320C6201 tms320c67x font label

    R5F563T6EGFM

    Abstract: No abstract text available
    Text: Features DATASHEET RX63T Group Renesas MCUs R01DS0087EJ0210 Rev.2.10 Sep 26, 2013 100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, Two 12-bit ADCs three S/H circuits, double data registers, amplifier, comparator , one 10-bit ADC, simultaneous sampling on 7 channels using three ADCs, 100 MHz PWM (2 three-phase complementary channels + 4 single-phase


    Original     		PDF RX63T R01DS0087EJ0210 100-MHz 32-bit 12-bit 10-bit IEEE-754 R5F563T6EGFM

    TLCS-90

    Abstract: 8001H PS42A tlcs-900 TMP93CS32 tlcs90 tlcs-90 cpu xor TMP95 bcd cc 106 1p0
    Text: TLCS-900/L CPU 900, 900/L, 900/H, 900/L1, 900/H2 CPU Core Different Points There are 5 type CPU core: ① 900, ② 900/L, ③ 900/H, ④ 900/L1, ⑤ 900/H2 in TLCS-900 Family and they are different from following points. CPU 900 900/L 900/H, 900/L1 Address Bus


    Original     		PDF TLCS-900/L 900/L, 900/H, 900/L1, 900/H2 TLCS-900 TLCS-90 8001H PS42A TMP93CS32 tlcs90 tlcs-90 cpu xor TMP95 bcd cc 106 1p0

    LB 124 d

    Abstract: BH RV transistor i960 Cx Processor Instruction Set Quick Reference 80960JT 80960RM 80960RN REQ64 BIT3102 273160 80960
    Text: i960 RM/RN I/O Processor Developer’s Manual July 1998 Order Number: 273158-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability


    Original     		PDF 80960RxJx Index-11 LB 124 d BH RV transistor i960 Cx Processor Instruction Set Quick Reference 80960JT 80960RM 80960RN REQ64 BIT3102 273160 80960

    M58BF008

    Abstract: AN1269 MPC555
    Text: AN1269 APPLICATION NOTE Connecting the MPC555 Microcontroller to the M58BF008 Series Flash Memory CONTENTS • INTRODUCTION ■ ADVANTAGES OF FLASH ■ M58BF008 BUS ARCHITECTURE ■ MPC555 BUS ARCHITECTURE – Booting the MPC555 from External Flash ■ ■


    Original     		PDF AN1269 MPC555 M58BF008 MPC555 AN1269

    M58BF008

    Abstract: MPC555 AN1269
    Text: AN1269 APPLICATION NOTE Connecting the MPC555 Microcontroller to the M58BF008 Series Flash Memory CONTENTS • INTRODUCTION ■ ADVANTAGES OF FLASH ■ M58BF008 BUS ARCHITECTURE ■ MPC555 BUS ARCHITECTURE – Booting the MPC555 from External Flash ■ ■


    Original     		PDF AN1269 MPC555 M58BF008 MPC555 AN1269

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET RX62T Group, RX62G Group Renesas MCUs R01DS0096EJ0200 Rev.2.00 Jan 10, 2014 100-MHz 32-bit RX MCUs, FPU, 165 DMIPS, 12-bit ADC 3 S/H circuits, double data register, amplifier, comparator : two units, 10-bit ADC one unit, the three ADC units are


    Original     		PDF RX62T RX62G R01DS0096EJ0200 100-MHz 32-bit 12-bit 10-bit

    Architecture of TMS320C67X

    Abstract: TMS320C67x FPN 5855 hl 4020 cruise missile data sheet voice control robot 1250H 51A3 of TMS320C67X circuit diagram of cruise controlled system
    Text: TMS320C6000 CPU and Instruction Set Reference Guide Literature Number: SPRU189D March 1999 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest


    Original     		PDF TMS320C6000 SPRU189D TMS320 TMS320C62x TMS320C67x Architecture of TMS320C67X FPN 5855 hl 4020 cruise missile data sheet voice control robot 1250H 51A3 of TMS320C67X circuit diagram of cruise controlled system

    C64X hpi

    Abstract: 1238H C64X CPU description C6000 SPRU189 SPRU190 TMS320C6000
    Text: TMS320C6000 DSP Host Port Interface HPI Reference Guide Literature Number: SPRU578B May 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue


    Original     		PDF TMS320C6000 SPRU578B C64X hpi 1238H C64X CPU description C6000 SPRU189 SPRU190

    PC1238

    Abstract: 1238H UPC1238H PPC12 PC1238V QQEZ773 nec 14 tv diagram jiPC1238 MPC123
    Text: N E C 6427525 N ELECTRONICS ELECTRONICS INC OSE D | t,M27525 0G22772 7 ^| ~ 05E INC 22772 BIPOLAR ANALOG INTEGRATED C IR C U IT M P C 12 3 8 P C 1238H T - 7 V - O5 -0 I 10 W A F P O W E R AMPL IF IE R T h e ^ P C 1 2 3 8 is an a ud io pow er a m p lifie r designed fo r m edian H i- F i stereo set and T V set sound pow er a m p lifie r.


    OCR Scan     		PDF M27525 0G22772 1238H ME75E5 00EE777 //PC1238H PC1238 1238H UPC1238H PPC12 PC1238V QQEZ773 nec 14 tv diagram jiPC1238 MPC123

    TLCS-90

    Abstract: SR8800 ycym tlcs90
    Text: TOSHIBA TLCS-900/L CPU SBC dst, src < Subtract with Carry Jtjj fÈ : dst«—dst —src —CY E& ^ : dst<7 p ^ 't'o ^ ]b src<7) F*ü^ b^ -y ’J — ^ 'J > y ÿ 7'CY D dst^lSjöl £ t i # *fl : f "f X /W > 7 - K n- K uyV o o o SBC R, r 1 1 z 1 0 O O O SBC


    OCR Scan     		PDF TLCS-900/L CPU900L-150 CPU900L-191 900/Lii, 16fcf TLCS-90CI& TLCS-900/LT TLCS-90 SR8800 ycym tlcs90

    7654h

    Abstract: TLCS-900 1234H 2654H TLCS-900H
    Text: T O S H IB A TLCS-900/H CPU OR dst, src < Logical OR > O peration Description : dst<—dst OR src : Ors the contents of dst w ith those of src and loads the resu lt to dst. Truth table A B A OR 1 1 1 1 1 1 1 B D etails Size Byte Word Mnemonic Code Long word_


    OCR Scan     		PDF TLCS-900/H CPU900H-115 01000000B CPU900H-154 CPU900H-155 7654h TLCS-900 1234H 2654H TLCS-900H

    tmp96c141

    Abstract: PC 1278H 2001H TLCS-900
    Text: T O S H IB A TLCS-900 JP condition, dst < Jum p > Operation : If cc is true, then PC < - dst. Description : If the operand condition is true, jumps to the program address specified by dst. Details F lags Mnemonic : S S Z H V N C JP #16 JP #24 JP [cc,] mem


    OCR Scan     		PDF TLCS-900 2000H 2000H. CPU900-93 01000000B CPU900-127 tmp96c141 PC 1278H 2001H

    PC 1278H

    Abstract: 123AH 00123457H
    Text: TO SH IB A TLCS-900/H CPU HALT < H alt CPU > Operation : CPU halt Description : H alts the instruction execution. To resume, an interrupt m ust de received. Details : Mnemonic HALT Flags : S S Z H V N C Z H V N = = = = = = Code 0|0|0|0|0|1|0|1 C No change


    OCR Scan     		PDF TLCS-900/H CPU900H-82 0002H, CPU900H-113 CPU900H-114 PC 1278H 123AH 00123457H