10NFLOW Search Results

88915

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C 88915 Low S k e w CMOS PLL C lock Driver The M C 88915 C lock D river utilizes phase-locked loop technology to lock its low skew outputs' frequency and phase onto an input reference clock. It is designed to provide clock

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Skew CMOS PLL Clock Driver With Power-Down/Power-Up Feature The MC88920 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor

OHD 3- 80M

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low V oltage Low S kew CMOS PLL Clock Driver, 3 -S ta te M C88LV915T The MC88LV915T Clock Driver utilizes phase-locked loop technology to lock its low skew outputs' frequency and phase onto an input reference clock. It is designed to provide clock distribution for high performance

88LV926

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information Low S kew CMOS PLL 6 8 0 6 0 C lock D river The MC88LV926 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor