10DMB Search Results

C401 diode

Abstract: 10DC IR transistor 10dc ir C4016 C4019 C401 CY7C401 CY7C402 CY7C403 C4013
Contextual Info: CY7C401/CY7C403 CY7C402/CY7C404 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO Features words. Both the CY7C403 and CY7C404 have an output enable OE function. • 64 x 4 (CY7C401 and CY7C403) 64 x 5 (CY7C402 and CY7C404) High-speed first-in first-out memory (FIFO)

TP 152N

Abstract: CI23 k7315 2A mosfet igbt driver stage as256words CY7C123
Contextual Info: MbE D CYPRESS SEMICONDUCTOR E3 2 S 0 ciL.iJ2 D D O b B I R 7 C l C Y P CY7C123 CYPRESS SEMICONDUCTOR Functional Description 256 x 4 static RAM for control store in high-speed computers CMOS foroptimum speed/power High speed — 7 ns commercial — 10 ns (military)

16R4 programming specification

Abstract: PAL16L8 programming specifications PAL16L8 PAL16R4 16L8 16R4 16R8 PAL16L8-7JC PAL16L8-7PC PAL16R6-5DC
Contextual Info: PAL 20 Series 16L8/16R8 16R6/16R4 ^ CYPRESS 4.5-ns, Industry-Standard PLDs Features Functional Description • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpo = 4.5 ns — ts = 2.5 ns — *MAX = 142.9 MHz external • Popular industry standard architec­

12L10

Abstract: 16L6 20L10 20L8 PLD20G10C 12DC
Contextual Info: 4bE SEMICONDUCTOR SSÔTbtS D OGGbTMM PRELIMINARY CYPRESS SEMICONDUCTOR Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 7.5 ns — tsu = 3 ns — fM A X = 1 0 5 M tte • Reduced ground bounce and under­

PAL20

Abstract: PAL16L8A
Contextual Info: PAL 20 Series 16L8/16R8 16R6/16R4 CYPRESS SEMICONDUCTOR — 4.5-ns, Industry-Standard PLDs Features Functional Description • Ultra high speed supports today’s and tomorrow’s fastest microprocessors C ypress PAL20 Series devices consist of th e PAL16L8, PAL16R8, PAL16R6, and

Contextual Info: PAL22V10C _ PAL22VP10C Universal PAL Device SEMICONDUCTOR Features • • Ultra high speed supports today’s and tomorrow’s fastest microprocessors 10 user>programmable output macrocells — Output polarity control — Registered or combinatorial

Contextual Info: CY7B161 CY7B162 f ' YPPI7QC! SEMICONDUCTOR Features Functional Description • U ltra high speed — 8 ns tAA • Low active power — 700 mW • Low standby power — 250 mW • Transparent write (7B161 • BiCMOS for optimum speed/power • TTL-compatible inputs and outputs

Contextual Info: PALCE16V8 V CYPRESS Features • • A ctive p u ll-u p on d ata in p u t p in s • Low pow er version 16V 8L • • — 5 5 m A m ax. com m ercial (1 0 ,1 5 ,2 5 n s) — 65 mA max. industrial (1 0 ,1 5 ,2 5 ns) — 65 m A m ilitary (15 an d 25 n s) •

Contextual Info: CY101E484 CY10E484 CY100E484 .1 ^ CYPRESS SEMICONDUCTOR Features • 4096 x 4-bit organization • Ultra high speed/standard power — tAA = 4 ,5 ns — I e e ~ 320 mA • Low-power version — tAA = 7,10 ns — Iee = 200 mA • Both 10KH/10K- and 100K-compatible I/O versions

Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 5 ns — tsu = 2.5 ns — fMAX= 153.8 MHz • Reduced ground bounce and under­ shoot • PLCC and LCC packages with addi­ tional V cc and Vs s pins for lowest

Contextual Info: CYPRESS SEMICONDUCTOR Flash Erasable, Reprogrammable CMOS PAL Device DIP, LCC, and PLCC available — 7.5 ns commercial version 5 ns tco 5 ns t§ 7.5 ns tpo 133-MHz state machine — 10 ns military and industrial ver­ sions 6 ns tco 6 ns tg 10 ns tpo 110-MHz state machine

20V8

Abstract: 20L8 PALCE20V8
Contextual Info: 20V8 PALCE20V8 Flash Erasable, Reprogrammable CMOS PAL Device Features • QSOP package available — 10, 15, and 25 ns com’l version • Active pull-up on data input pins • Low power version 20V8L — 55 mA max. commercial (15, 25 ns) — 15, and 25 ns military/industrial versions

16X64

Abstract: C123-6 c1235 P13A C1232
Contextual Info: CY7C123 256 x 4 Static RAM Features tion operation ensures minimum write re­ covery times by eliminating the “write re­ covery glitch.” Functional Description • 256 x 4 static RAM for control store in high-speed computers • CMOS for optimum speed/power

C40110

Abstract: C401-16
Contextual Info: CY7C401/CY7C403 CY7C402/CY7C404 64 x 4 Cascadable FIFO 64 x 5 Cascadable FIFO Features cading. The output ready OR signal is a flag to indicate the output contains valid data (HIGH), to indicate the FIFO is empty (LOW), and to provide a signal for cascading.

20V8-25

Abstract: 20L8 20V8 PALCE20V8 ULTRA37000TM CG-02
Contextual Info: USE ULTRA37000TM FOR ALL NEW DESIGNS PALCE20V8 Flash-Erasable Reprogrammable CMOS PAL Device Features • QSOP package available — 10, 15, and 25 ns com’l version • Active pull-up on data input pins — 15, and 25 ns military/industrial versions • Low power version 20V8L

7B339

Abstract: 7B339-7
Contextual Info: CY7B339 PRELIMINARY CYPRESS SEMICONDUCTOR 7-ns BiCMOS PAL with Output Latches • Available in 28-pin 340-mil PDIP and CerDIP, and in SOJ, PLCC, and LCC packages Features • Very high performance decoder with latched outputs — tpo = 7 ns — tLEO = 5-5 ns

Contextual Info: CY7B161 CY7B162 n Y p p p c q Features Functional D escription • Ultra high speed T he CY7B161 and CY 7B162 are highperform ance B iC M O S static R A M s orga­ nized as 16,384 by 4 bits w ith separate I/O . Easy m em ory expansion is provided by ac­ tive LO W chip en ab les Cl'-i, CF-2 and

7B338

Abstract: ic 7b338
Contextual Info: CY7B338 PRELIMINARY CYPRESS SEMICONDUCTOR • Available in 28>pin 300-mil PDIP and CerDIP, and in SOJ, PLCC, and LCC packages • Very high performance decoder with latched outputs — tpj — 6 ns Functional Description T he CY7B338 is a 6-ns, 28-pin p ro g ram ­

Contextual Info: CY7C123 ^ ^ ^ 5 * Æ C T Y P R K S .S ~ SEMICONDUCTOR 256 x 4 Static R/W RAM Features Functional Description • 256 x 4 static RAM for control store in high-speed computers • CMOS for optimum speed/power • High speed — 7 ns commercial — 10 ns (military)

7C402

Contextual Info: CY7C401/CY7C403 CY7C402/CY7C404 CYPRESS SEMICONDUCTOR Cascadable 64 x 4 FIFO and 6 4 x 5 FIFO Functional Description • 64 X 4 CY7C401 and CY7C403 64 x 5 (CY7C402 and CY7C404) High-speed first-in first-out memory (FIFO) The CY7C401 and CY7C403 are asynch­

jw32

Contextual Info: CYPRESS PRELIMINARY Flash Erasable, Reprogrammable CMOS PAL Device Features Up to 16 input terms and 8 outputs • Advanced second-generation PAL ar­ chitecture • Low power — 90 mA max. commercial 10,15, 25 ns — 115 mA max. commercial (7 ns) — 130 mA max. military/industrial

Contextual Info: PAL22V10G PAL22VP10G PRELIMINARY ” I CYPRESS SEMICONDUCTOR • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 5 ns — tgu = 2.5 ns — fMAX = 153.8 MHz • Reduced ground bounce and under­ shoot • PLCC and LCC packages with addi­

IRC2D

Abstract: 5L0F
Contextual Info: CY7C401/CY7C403 CY7C402/CY7C404 ss CYPRESS SEMICONDUCTOR Cascadeable 64 x 4 FIFO and 64 x 5 FIFO Features • 64 x 4 CY7C401 and CY7C403 64 x 5 (CY7C402 and CY7C404) H igh speed first-in first-out memory (FIFO) • Processed with high-speed C M O S for optimum

C123

Abstract: CY7C123 P13A
Contextual Info: CY7C123 256 x 4 Static RAM Features Functional Description • 256 x 4 static RAM for control store in high-speed computers • CMOS for optimum speed/power • High speed — 7 ns commercial The CY7C123 is a high-performance CMOS static RAM organized as 256 words by 4 bits. Easy memory expansion is provided by an active LOW chip select one (CS1) input, an active