7c361
Abstract: No abstract text available
Text: M CY7C361 CYPRESS SEMICONDUCTOR Features • High speed: 125-MHz state machine output generation — Token passing — M ultiple, concurrent processes — Multiway branch or join Ultra High Speed State Machine EPLD — Skew-controlled OR output array — Outputs are sum o f states like PLA
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CY7C361
28-pin
CY7C361.
CY7C361
300-M
361--83HC
61--83W
361--83H
7c361
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PDF
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CY7C361
Abstract: No abstract text available
Text: CY7C361 PRELIMINARY s CYPRESS SEMICONDUCTOR A programmable on-board clock doubler allows the device to operate at 125 MHz in ternally based on a 62.5-MHz input clock reference. The clock doubler is not a phase-lockedloop. It produces an internal pulse on each edge of the external clock.
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CY7C361
125-MHz
10-year
28-pin
28-pinPLCC
CY7C361
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PDF
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CY7C361
Abstract: No abstract text available
Text: CY7C361 CYPRESS SEMICONDUCTOR The CY7C361 is a CMOS erasable, pro grammable logic device EPLD with very high speed sequencing capabilities. A programmable on-board clock doubler allows the device to operate at 125 MHz in ternally based on a 62.5-MHz input clock
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CY7C361
CY7C361
CY7C361.
125-MHz
28-Lead
300-Mil)
CY7C361â
83HMB
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PDF
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CY7C361
Abstract: c3611 one hot state machine Cypress Applications Handbook 7C361 83HM
Text: CY7C361 CYPRESS SEMICONDUCTOR F eatures • High speed: 125-MHz state machine output generation — Token passing — Multiple, concurrent processes — Multiway branch or join • One clock with programmable clock doubler • Programmable miser bits for power
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OCR Scan
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CY7C361
125-MHz
10-year
28-pin
CY7C361
100WMB
28-Lead
300-Mil)
c3611
one hot state machine
Cypress Applications Handbook
7C361
83HM
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PDF
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