10003A Search Results
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VISHAY AMETHERM SL1010003AICL 10 OHM 20% 3A 10MM |
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SL1010003A | Bulk | 568 | 1 |
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ZETTLER Magnetics Inc BV202D10003A115V INPUT 0.35VA PWR XFMR |
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BV202D10003A | Tube | 480 | 1 |
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ZETTLER Magnetics Inc BV201S10003A115V INPUT 0.35VA PWR XFMR |
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ZETTLER Magnetics Inc BV202S10003A115V INPUT 0.35VA PWR XFMR |
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BV202S10003A | Tube | 480 | 1 |
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ZETTLER Magnetics Inc BV201D10003A115V INPUT 0.35VA PWR XFMR |
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BV201D10003A | Tube | 474 | 1 |
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10003A Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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ispLSI 3256AContextual Info: ispLSI 3256A In-System Programmable High Density PLD Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable |
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0212/3256A 256A-90LM* 160-Pin 256A-90LQ 256A-70LM* 256A-70LQ 256A-50LM* ispLSI 3256A | |
PLSI 1016-60LJ
Abstract: PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT
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1016E 1032E 20ters 48-Pin 304-Pin PLSI 1016-60LJ PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT | |
Contextual Info: ispLSI 3256A High Density Programmable Logic Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable |
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Contextual Info: ispLSI 3256A In-System Programmable High Density PLD Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable |
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0212/3256A 256A-90LM* 256A-90LQ 256A-70LM* 256A-70LQ 256A-50LM* 160-Pin | |
TQFP 144 to jtagContextual Info: Introduction to ispLSI 2000E, 2000VE and 2000VL Families ❑ ❑ ❑ Introduction Lattice Semiconductor Corporation’s ispLSI Families are high density and high performance E2CMOS® programmable logic devices. They provide design engineers with a superior system solution for integrating high speed |
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2000E, 2000VE 2000VL 1-0003C/2K TQFP 144 to jtag | |
2000VL
Abstract: e2cmos technology TQFP 100 PACKAGE TQFP 144 PACKAGE 2064VE 2064VL 2128VE 2128VL tqfp 128 ISPLSI2064A
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2000E, 2000/A, 2000VE, 2000VL 2000VE 2000VL 2032E, e2cmos technology TQFP 100 PACKAGE TQFP 144 PACKAGE 2064VE 2064VL 2128VE 2128VL tqfp 128 ISPLSI2064A | |
Contextual Info: ispLSI 3160 High Density Programmable Logic Features Functional Block Diagram E3 E2 E1 E0 A0 ORP OR Array ORP A2 A3 D Q D2 D Q D Q D Q OR Array D Q Twin GLB D1 ORP • HIGH PERFORMANCE E CMOS TECHNOLOGY — fmax = 125 MHz Maximum Operating Frequency — tpd = 7.5 ns Propagation Delay |
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Contextual Info: Introduction to ispLSI and pLSI 2000/V Families ® Introduction Lattice Semiconductor Corporation’s ispLSI and pLSI Families are high-density and high-performance E2CMOS® programmable logic devices. They provide design engineers with a superior system solution for |
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2000/V | |
Contextual Info: ispLSI 3256A In-System Programmable High Density PLD Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable |
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0212/3256A 256A-90LM* 160-Pin 256A-90LQ 256A-70LM* 256A-70LQ 256A-50LM* | |
CABGA
Abstract: CABGA-208 e2cmos technology ispLSI 2000VE TQFP 32 PACKAGE 2032E 2064VE 2064VL 2096E 2128VE
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2000E, 2000VE 2000VL 1-0003C/2K CABGA CABGA-208 e2cmos technology ispLSI 2000VE TQFP 32 PACKAGE 2032E 2064VE 2064VL 2096E 2128VE | |
3256A70Contextual Info: ispLSI 3256A Device Datasheet June 2010 All Devices Discontinued! Product Change Notification PCN #09-10 has been issued to discontinue all devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes. |
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256A-70LQ 256A-90LQ 256A-70LQI 0212/3256A 256A-90LM* 160-Pin 256A-70LM* 3256A70 | |
10mm Round LED
Abstract: Round 10034W2C-CUA-C LED 10mm white led 10034w2c-cua-c 10034G3C-CSE-B 10034R1C-CSE-D 10034G3C-CSC-A 10003R1C-CSB-B 10034Y1C-CSE-D
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10003R1C-CSA-A 10003R1C-CSB-B 10034R1C-CSC-C 10034R1C-CSE-D 10003N1C-CSB-B 10003A1C-CSB-B 10034W2C-CSC-A 10034W2C-CSD-B 10034W2C-CUA-C 10mm Round LED Round 10034W2C-CUA-C LED 10mm white led 10034w2c-cua-c 10034G3C-CSE-B 10034R1C-CSE-D 10034G3C-CSC-A 10003R1C-CSB-B 10034Y1C-CSE-D | |
Contextual Info: Introduction to ispLSI and pLSI 2000/V Family ® Introduction Lattice Semiconductor Corporation’s LSC ispLSI and pLSI families are high-density and high-performance E2CMOS ® programmable logic devices. They provide design engineers with a superior system solution for |
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2000/V | |
lM 3160Contextual Info: ispLSI and pLSI 3160 ® High Density Programmable Logic Features Functional Block Diagram E3 E2 E1 E0 A0 ORP OR Array ORP A2 A3 D Q D2 D Q D Q D Q OR Array D Q Twin GLB D1 ORP • HIGH PERFORMANCE E CMOS TECHNOLOGY — fmax = 125 MHz Maximum Operating Frequency |
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Contextual Info: ispLSI 3256A High Density Programmable Logic Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable |
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0212/3256A 256A-90LM* 160-Pin 256A-90LQ 256A-70LM* 256A-70LQ 256A-50LM* | |
Contextual Info: Lattice ispLSr and pLSr 3160 I corporationt0r High DensitV Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 160 I/O Pins — 7000 PLD Gates — 320 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State |
OCR Scan |
208-Pin 3160-100LM 3160-70LM 3160-125LM | |
Contextual Info: y f c c n o e ' 1? Lattica i s !Semiconductor •Corporation p L S r 3 1 6 High Density Programmable Logic F u n c tio n a l B lo c k D iagram F eatures • HIGH-DENSITY PROGRAMMABLE LOGIC — 160 I/O Pins — 7000 PLD Gates — 320 Registers — High Speed G lobal Interconnect |
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P--------125 100MHzfmax 3160-X 0212B/3160 3160-125LQ 3160-125LB272 3160-125LM* 3160-100LQ 3160-100LB272 3160-100LM* | |
Erasable Programmable Logic Device 610Contextual Info: Lattica ispLSI‘32S6A ;Semiconductor ICorporation Features HIGH-DENSITY PROGRAMMABLE LOGIC — 128 I/O Pins — 11000 PLD Gates — 384 Registers — High Speed Global Interconnect — W ide Input Gating for Fast Counters, State Machines, Address Decoders, etc. |
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0212/3256A 256A-90LM* 256A-90LQ 256A-70LM* 256A-70LQ 256A-50LM* 160-Pin Erasable Programmable Logic Device 610 | |
SL10
Abstract: A10003A 10003A
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0003-A 120VAC/240VAC CA118061 SL10 A10003A 10003A | |
10003AContextual Info: DATA SHEET Part Number: SL08 10003 Ordering Different Lead Types: Inside Kinked Leads Outside Kinked Leads Use -A after Ametherm’s part # Not Available For example: to order an inside kinked lead use part number SL08 10003-A D D D T C B L S S S STRAIGHT |
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0003-A 120VAC/240VAC 10Current F/160 10003A | |
B272
Abstract: 203d6
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0212B/3160 3160-125LQ 208-Pin 3160-125LB272 272-Ball 3160-125LM* 3160-100LQ 3160-100LB272 B272 203d6 | |
Contextual Info: ispLSI 3256A In-System Programmable High Density PLD Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable |
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0212/3256A 256A-90LM* 160-Pin 256A-90LQ 256A-70LM* 256A-70LQ 256A-50LM* | |
CXD 8003
Abstract: 9834h SPRU035 TMS320 TMS320C40 TMS320C44 XDS510 TMS320 Family theory 9850h 9836h
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TMS320C4x SPRU063B SPRU063 CXD 8003 9834h SPRU035 TMS320 TMS320C40 TMS320C44 XDS510 TMS320 Family theory 9850h 9836h | |
isplsi architectureContextual Info: Introduction to ispLSI and pLSI* 2000 Family * ispLSI and pLSI 2000 Family Introduction Lattice Semiconductor Corporation's LSC ispLSI and pLSI families are high-density and high-performance E2CMOS programmable logic devices. They provide design engineers with a superior system solution for |
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84-pin 100-pin 128-pin 160-pin 176-pin 003A/2K 44-Pin isplsi architecture |