1.2 MICRON CMOS Search Results

1.2 Micron CMOS Process Family

Abstract: 1.2 micron cmos P-MOSFET metal oxide in capacitor vertical PNP metal resistor 0.8 Micron CMOS Process Family 0.03 um CMOS technology
Contextual Info: 1.2 Micron CMOS Process Family  June 1995 Features Process Parameters • Double Poly / Double Metal • 2.4 µm Poly and Metal I Pitch • 5.5 Volts Maximum Operating Voltage • Twin-tub • • 1.2µm 5volts Units Metal I pitch width/space 1.4 / 1.0

PD65000

Abstract: 8748 NEC CMOS-5 NEC nec 8748 94Q3 NEC CMOS-4
Contextual Info: SEC CMOS-5 1.2-MICRON CMOS GATE ARRAYS NEC Electronics Inc. PRELIM INARY Description The CM O S-5 gate arrays are low -pow er, high-speed integrated circu its fea tu ring 1.2-m icron silicon -ga te CMOS technology. The basic cell on the gate array chip consists o f six transistors, three p-channel and

HS-26CT32MS

Contextual Info: HS-26CT32MS ÊE HÄSKSS Radiation Hardened Quad Differential Line Receiver December 1992 Pinouts Features HS1-26CT32MSR 16 PIN CERAMIC DUAL-IN-LINE CASE OUTLINE 02, CONFIGURATION 3 TOP VIEW • 1.2 Micron Radiation Hardened CMOS • Total DoseUp to 300KRAD SI

CMOS Process Family

Abstract: 1.5um cmos process family
Contextual Info: 1.5 Micron CMOS Process Family  February 1996 Features Technology Outline • • • • • • • • LOVMOS Processes 2.7~3.6 Volts Low Voltage Option 1.2 Volts Very Low Voltage Option 5.5 Volts Maximum Operating Voltage Double Poly / Double Metal

Contextual Info: HONEYUIELL/SS ELEK-, MIL "□3 D e 4551072 000055b 7 f T Honeywell 't e '/ M HCS15000 Preliminary RADIATION HARDENED CMOS GATE ARRAYS FAMILY FEATURES • Radiation Hardened Series of 1.2-Micron RICMOS Gate Arrays 1Proven VLSI Design System VDS) Toolkit™

26CT32RH

Contextual Info: HS-26CT32RH S Radiation Hardened Quad Differential Line Receiver March 1995 Features Pinouts • 1.2 Micron Radiation Hardened CMOS -Total Dose Up to 300K RAD Si HS1-26CT32RH 16 LEAD CERAMIC SIDEBRAZE DIP CASE OUTLINE D2, CONFIGURATION C TOP VIEW • Latchup Free

26C31

Abstract: Harris top marking
Contextual Info: HS-26C31RH Semiconductor Radiation Hardened Quad Differential Line Driver November 1995 Features Pinouts • 1.2 Micron Radiation Hardened CMOS 16 Lead Ceramic Dual-in-Line Metal Seal Package SBDIP Mil-Std-1835 CDIP2-T16 TOP VIEW - Total Dose Up to 300K RAD(Si)

Contextual Info: HS-26CT31RH S MAfSSf? Radiation Hardened Quad Differential Line Driver March1995 Features Pinouts HS1-26CT31RH 16 LEAD CERAMIC SIDEBRAZE DIP CASE OUTUNE D2, CONFIGURATION C TOP VIEW • 1.2 Micron Radiation Hardened CMOS - Total Dose Up to 300K RAD Si • Latchup Free

1.2 micron cmos

Abstract: 1.2 Micron CMOS Process Family 12-micron CMOS Process Family
Contextual Info: 1.2 Micron CMOS Process Family  February 1996 Features • • • • • • Process Parameters Double Poly / Double Metal 2.4 µm Poly and Metal I Pitch 5.5 Volts Maximum Operating Voltage Twin-tub process ProToDuctionTM Option for prototypes Standard Cell Library

inmos static ram

Contextual Info: IMS1820M CMOS High Performance 64K x 4 Static RAM MIL-STD-883C imos Advance Information / /' / FEATURES DESCRIPTION • INMOS'Very High Speed CMOS • Advanced Process -1.2 Micron Design Rules • 64K x 4 Bit Organization • 30, 35 and 45 ns Address Access Times

1.2 Micron CMOS Process Family

Contextual Info: 1.2 Micron CMOS Process Family Process parameters Features • Double Poly / Double Metal, • 2.4 µm Poly and Metal I Pitch, • 5.5 Volts Maximum Operating Voltage, • Twin-tub process on P-type or N-type wafers, • ProToDuctionTM Option for low cost prototypes,

Contextual Info: IMS1800M CMOS High Performance 256K x 1 Static RAM MIL-STD-883C mos Advance Information DESCRIPTION FEATURES • INMOS' Very High Speed CMOS • Advanced Process -1.2 Micron Design Rules • 256K x 1 Bit Organization • 30, 35 and 45 ns Address Access Times

Contextual Info: Preliminary IIIÌMÌIII AffHSl September 1989 OPEN ASIC DATASHEET MAF GATE ARRAY SERIES 1.2 MICRON CMOS FEATURES . . . . . . HIGH LOAD DRIVE CAPABILITY EXCEEDING 35 mA • GATE COUNTS : 250 AND 800 . WIDE PACKAGE RANGE . EXCELLENT FOR FUSE PROGRAMMABLE ARRAYS AND BIPOLAR LOGIC REPLACE­

ER142503.6V

Abstract: ER14250-VB3.6V
Contextual Info: CMOS- CSI 1.2 micron Process OPERATING LIFE @ TA = +125C AT RATED VOLTAGE Family Custom Driver Device MCD00002 Lot # 66210891 Package WSOIC Vcc 5.6V Qty 115 Time Point Failures Act Act Act Total Hrs Fails Hrs Fails Hrs Fails Dev. Hrs 168 500 1000 0 115000

Contextual Info: 3 HS-65647RH Radiation Hardened December1992 8K x 8 SOS CMOS Static RAM Functional Diagram Features • 1.2 Micron Radiation Hardened SOS CMOS - Total Dose 3 x 10s RAD SI - Transient Upset >1 x 1011 RAD (Siys - Single Event Upset < 1 x 10'12 Errors/Bit-Day

Contextual Info: HS-26CT31MS H A R R IS SEMICONDUCTOR Radiation Hardened Quad Differential Line Driver Decem ber 1992 Pinouts Features HS1-26CT31MSR 16 PIN CERAMIC DUAL-IN-LINE CASE OUTLINE D2, CONFIGURATION 3 TOP VIEW • 1.2 Micron Radiation Hardened CMOS - Total Dose Up to 300K RAD SI

Contextual Info: ADC-208A ® 8-Bit, 20MSPS CMOS Flash A/D ADC-208 Compatible PRODUCT OVERVIEW The ADC-208A utilizes an advanced VLSI 1.2 micron CMOS in providing 20MHz sampling rates at 8-bits. The flexibility of the design architecture and process delivers latch-up free operation

lm324 adc flash converter

Abstract: HP2811 LM-3241 ADC-208ALC ADC-208ALM ADC-208AMC ADC-208AMM HA-5033 LM324 adc208alm
Contextual Info: ADC-208A ® 8-Bit, 20MSPS CMOS Flash A/D ADC-208 Compatible PRODUCT OVERVIEW The ADC-208A utilizes an advanced VLSI 1.2 micron CMOS in providing 20MHz sampling rates at 8-bits. The flexibility of the design architecture and process delivers latch-up free operation

vco 27MHz

Abstract: PLL VCO 27MHz phase sequence detector phone tap
Contextual Info: 0.13um, 12-145 MHz Phase Locke d Loop FEATURES • Industry Standard 0.13 Micron CMOS ■ Digital Logic Process; 1.2/3.3 volts ■ Digital Controlled Output Frequency — up to 145 MHz with a Symmetric Duty Cycle ■ Embedded VCO Frequency Range: 216 MHz, locked to 27

lm324 adc flash converter

Abstract: ADC-208AME
Contextual Info: ADC-208A ® 8-Bit, 20MSPS CMOS Flash A/D ADC-208 Compatible PRODUCT OVERVIEW The ADC-208A utilizes an advanced VLSI 1.2 micron CMOS in providing 20MHz sampling rates at 8-bits. The flexibility of the design architecture and process delivers latch-up free operation

Contextual Info: ADC-208A ® 8-Bit, 20MSPS CMOS Flash A/D ADC-208 Compatible PRODUCT OVERVIEW The ADC-208A utilizes an advanced VLSI 1.2 micron CMOS in providing 20MHz sampling rates at 8-bits. The flexibility of the design architecture and process delivers latch-up free operation

Contextual Info: SYSTEMS SLA8000 Series June 1988 VERY HIGH SPEED CHANNELLESS CMOS GATE ARRAYS D escription The SLA8000 Series consists of a group of seven very high-speed, sea-of-gates CMOS gate arrays. The series is fabricated utilizing our state-of-the-art 1.2 micron sili­

hp2811

Abstract: hp2811 diode LM324 16 PIN DETAILS lm324 adc flash converter adc-208a datel Delay Lines murata ADC-208ALC ADC-208ALM ADC-208AMC ADC-208AMM
Contextual Info: www.murata-ps.com ADC-208A 8-Bit, 20MSPS CMOS Flash A/D ADC-208 Compatible PRODUCT OVERVIEW The ADC-208A utilizes an advanced VLSI 1.2 micron CMOS in providing 20MHz sampling rates at 8-bits. The flexibility of the design architecture and process delivers latch-up free operation

transistor B324

Abstract: transistor B324 pin out B324 transistor off grid inverter schematics full subtractor circuit nand gates ALI 3105 i203 transistor B304 transistor mxe3
Contextual Info: H o n eyw ell 4551872 HO NE Y WE LL / SS HC20000 ELEK, M IL 03E 00236 D Preliminary HIGH-PERFORMANCE CMOS GATE ARRAY FEATURES • Performance Optimized Series of 1.2-Micron CMOS Gate Arrays 1Proven VLSI Design System VDS Toolkit •Boundary and Internal Scan