001350B Search Results

Contextual Info: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES

m387

Contextual Info: HARRIS SEMICOND SECTOR 33 HARRIS ME D I 43Da571 0D135Q2 t | H 1 - 3 8 7 / 8 8 3 T-51-11 SPDT CMOS Analog Switch January 1 9 8 9 Features Description • This Circuit Is Procèsseci In Accordance to M il-S td 883 and Is Fully Conform ant Under the Provisions of

93c46 wm

Abstract: 22 pin ccd, dip, bar code HBCR2311 MSI IC decoder SMD 5 PIN CODE ad2 AD438 IC LA 4044 AUDIO
Contextual Info: W m HEW LETT WL'liM P A C K A R D Program m able Bar Code D ecode ICs Technical Data HBCR-2310 HBCR-2311 HBCR-2312 F eatu res • Supports 8 Bar Code Sym bologies • Ideal for Hand, CCD, and Laser Scanning Applications • Autom atic Code Recognition • Serial or Parallel I/O

Contextual Info: SONY CXA1845Q PC Bus-Compatible Audio/Video Switch Description 64 pin QFP Plastic The CXA1845Q is a 7-input, 3-output audio/video switch featuring i2C bus compatibility for TVs. Features • Serial control via l2C bus • 7 inputs, 3 outputs • • •

MUN2111T1

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Bias Resistor Transistor MUN2111T1 SERIES PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network Motorola Preferred Devices This new series of digital transistors is designed to replace a single device and its

qml-38535

Abstract: HCS11
Contextual Info: REVISIONS DATE YR-MO-DA DESCRIPTION LTR APPROVED REV SHEET REV 15 SHEET REV REV STATUS OF SHEETS SHEET PREPARED BY Thanh V . Nguyen PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

32R2216RX

Contextual Info: SSI 32R2216RX ¿ ¡ ik o iiM +5V, 4-Channel, Thin Film Read/Write Device tm A TDK Group/Company July 1995 DESCRIPTION FEATURES The SSI 32R2216RX is a BiCMOS monolithic integrated circuit designed for use with two-terminal recording heads. It has a low noise read amplifier, write

Contextual Info: ADVANCE MT4LC8M8P4/C2 8 MEG X 8 DRAM |V|IC=RON DRAM 8 MEG x 8 DRAM 3.3V, EDO PAGE MODE PIN ASSIGNMENT Top View • Single +3.3V ±0.3V pow er supply • Industry-standard x8 pinout, timing, functions and packages • 13 row-addresses, 10 column-addresses (P4) or

Contextual Info: DS 1250Y/AB DALLAS DS1250Y/AB 4096K Nonvolatile SRAM SEMICONDUCTOR PIN ASSIGNMENT FEATURES • 10 years minimum data retention in the absence of external power Vcc A15 • Data is automatically protected during power loss A17 • Directly replaces 512K x 8 volatile static RAM