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    0.8UM CMOS Search Results

    0.8UM CMOS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    4104BDM
    Rochester Electronics LLC 4104B - TTL/CMOS to CMOS Translator, CMOS, CDIP16 Visit Rochester Electronics LLC Buy
    TN82C54-2
    Rochester Electronics LLC 82C54 - CMOS Programmable Timer Visit Rochester Electronics LLC Buy
    MG80C286-10/R
    Rochester Electronics LLC 80C286 - Microprocessor, 16-Bit, CMOS Visit Rochester Electronics LLC Buy
    MG8097/R
    Rochester Electronics LLC 8087 - Math Coprocessor, CMOS Visit Rochester Electronics LLC Buy
    MG80C286-10
    Rochester Electronics LLC 80C286 - Microprocessor, 16-Bit, CMOS Visit Rochester Electronics LLC Buy

    0.8UM CMOS Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    LRX 4311

    Abstract: 42dh TL258A
    Contextual Info: STLC3040 SUBSCRIBER LINE INTERFACE CODEC FILTER, COFISLIC • Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions. ■ Advanced 12V BJT, 5V CMOS 0.8um technol­ ogy. ■ Low external component count. ■ Over-sampling A/D and D/A conversion.


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    STLC3040 12kHz/16kHz 97TL3 PLCC44 LRX 4311 42dh TL258A PDF

    LRX 4311

    Abstract: 2CR3 TL257A XF MR 60hz trans battery fsc
    Contextual Info: STLC3040 SUBSCRIBER LINE INTERFACE CODEC FILTER, COFISLIC PRELIMINARY DATA Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions. Advanced 12V BJT, 5V CMOS 0.8um technol­ ogy. Low external com ponent count. Over-sampling A/D and D/A conversion.


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    STLC3040 12kHz/16kHz LRX 4311 2CR3 TL257A XF MR 60hz trans battery fsc PDF

    HT6576

    Abstract: CS2917 400NS t2d70
    Contextual Info: HT6576 Advanced SCSI CHIP Features • • • • • Support the ANSI X3.131-1986 standard Asynchronous transfer rate to 5 Mbyte/sec Support initiator and target mode 0.8um CMOS process • • On chip 48mA single-ended drivers and receivers Non internal clock needed


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    HT6576 44pins HT6576 CS2917 400NS t2d70 PDF

    400NS

    Abstract: HT6576A X3-131-1986 X313 t2d70
    Contextual Info: HT6576A Advanced SCSI CHIP Features • • • • • Support the ANSI X3.131-1986 standard Asynchronous transfer rate to 5 Mbyte/sec Support initiator and target mode 0.8um CMOS process • • On chip 48mA single-ended drivers and receivers Non internal clock needed


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    HT6576A 44pins 400NS HT6576A X3-131-1986 X313 t2d70 PDF

    Contextual Info: <ä v GM76C8128A/AL/ALL GoldStar 131,072 WORDS x 8 BIT CMOS STATIC RAM GOLDSTAR ELECTRON CO., LTD. Pin Configuration Description The GM76C8128A/AL/ALL is a 1,084,576 bits stat­ ic random access memory organized as 131,072 words by 8 bits. Using a 0.8um advanced CMOS


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    GM76C8128A/AL/ALL GM76C8128A/AL/ALL 70/85/100ns. 32-pin 600mil) 402A7S7 PDF

    0.8um

    Abstract: 1P2M BPSG MAGNACHIP
    Contextual Info: 0.8um 1P2M Logic 5V updated in Oct 01, 2004 Features ƒ Vdd Core/IO 5V/5V ƒ Starting Material P-type (100), 9~12 Ω/□ ƒ Well Structure CMOS Twin-well ƒ Isolation Conventional LOCOS ƒ Transistor Channel Buried channel PMOS Gate oxide (Electrical) 175Å


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    GM76C256all

    Abstract: GM76C256A GM76C256AL/ALL GM76C256A-TO GM76C256AL
    Contextual Info: GM76C256AL/ALL LG Semicon Co.,Ltd. 32,768 WORDS x 8 BIT CMOS STATIC RAM Pin Configuration Description The GM 76C256A is a 262,144 bits static random access memory organized as 32,768 words by 8 bits Using a 0.8um advanced CMOS technology, it provides high speed operation with minimum cycle


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    GM76C256A 55/70/85ns. GM76C256AL/ALL 28-pin 600mil) 450mil) GM76C256AL/ALL GM76C256all GM76C256A-TO GM76C256AL PDF

    Contextual Info: GM76C512/L/LL G oldStar 65,536 WORDS x 8 BIT CMOS STATIC RAM GOLDSTAR ELECTRON CO., LTD. The GM76C512/L/LL is a 524,288 bits static random access memory organized as 65,536 words by 8 bits. Using a 0.8um advanced CMOS technology, it provides high speed operation with


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    GM76C512/L/LL GM76C512/L/LL 32-pin 600mil) PDF

    GM76C256B

    Contextual Info: LG Semicon Co.,Ltd. Description GM76C256BL/BLL 32,768 WORDS x 8 BIT CMOS STATIC RAM Pin Configuration The GM76C256B is a 262,144 bits static random access memory organized as 32,768 words by 8 bits. Using a 0.8um advanced CMOS technology, it provides high speed operation with minimum cycle


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    GM76C256BL/BLL GM76C256B 55/70/85ns. GM76C256BL/BLL 28-pin 600mil) 450mil) PDF

    2P2M

    Abstract: 0.8um
    Contextual Info: 0.8um 2P2M Mixed Signal 5V updated in Oct 01, 2004 Features ƒ Vdd Core/IO 5V/5V ƒ Starting Material P-type (100), 9~12 Ω/□ ƒ Well Structure CMOS Twin-well ƒ Isolation Conventional LOCOS ƒ Transistor Channel Buried channel PMOS Gate oxide (Electrical)


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    0693M

    Contextual Info: r=7 SGS-THOMSON * 7 / . RülDœilLiOTWniêi STLC3040 SUBSCRIBER LINE INTERFACE CODEC FILTER, COFISLIC PR ELIM IN ARY DATA • Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions. ■ Advanced 12V BJT, 5V CMOS 0.8um technol­ ogy. ■ Low external component count.


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    STLC3040 97TL3 PLCC44 0693M PDF

    Contextual Info: STLC3040 SUBSCRIBER LINE INTERFACE CODEC FILTER, COFISLIC PR ELIM IN ARY DATA • Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions. ■ Advanced 12V BJT, 5V CMOS 0.8um technol­ ogy. ■ Low external component count. ■ Over-sampling A/D and D/A conversion.


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    STLC3040 97TL3 PLCC44 PDF

    Contextual Info: GM76C256CL/CLL-W 32,768 WORDS x 8 BIT CMOS STATIC RAM Description Pin Configuration The GM76C256CL/CLL-W is a 262,144 bits static random access memory organized as 32,768 words by 8 bits. Using a 0.8um advanced CMOS technology and operated from a single 2.7V to 5.5V supply.


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    GM76C256CL/CLL-W GM76C256CL/CLL-W GM76C256CL/ 17cannot PDF

    TDD 1605

    Abstract: lt 6029 PLCC-44 cr16 0.8um tg-500 L3000N L3000S PLCC44 SEL24 STLC3040
    Contextual Info: STLC3040 S U BSC R IBER LINE INTERFACE CODEC FILTER, CO FISLIC PRELIM IN ARY DATA PLCC44 O RDERING NUM BER: STLC3040FN Figure 1 : Pin Connection Top view o > [ « [ <° \ Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions. Advanced 12V BJT, 5V CMOS 0.8um technol­


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    STLC3040 PLCC44 TDD 1605 lt 6029 PLCC-44 cr16 0.8um tg-500 L3000N L3000S SEL24 STLC3040 PDF

    Contextual Info: G M 7 6 C 8 128A/AL/ALL GoldStar 131,072 WORDS x 8 BIT CMOS STATIC RAM GOLDSTAR ELECTRON C O , LTD. Pin Configuration Description The GM76C8128A/AL/ALL is a 1,084,576 bits stat­ ic random access memory organized as 131,072 words by 8 bits. Using a 0.8um advanced CMOS


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    28A/AL/ALL GM76C8128A/AL/ALL 70/85/100ns. 32-pin 600mil) GM76C8128A/AL/ALL PDF

    76C8128

    Abstract: gm76c8128 76C8128/L/LL
    Contextual Info: GM76C8128/L/LL GoldStar 131,072 WORDS x 8 BIT CMOS STATIC RAM GOLDSTAR ELECTRON CO., LTD. Pin Configuration Description The GM 76C8128/L/LL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits. Using a 0.8um advanced CMOS technology, it provides high speed operation with


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    GM76C8128/L/LL 76C8128/L/LL 70/85/100ns. 32-pin 600mil) 6C8128/L/LL 76C8128 gm76c8128 PDF

    GM76C8128all

    Abstract: GM76C8128A GM76C8128
    Contextual Info: LG Semicon Co.,Ltd. GM76C8128A/AL/ALL 131,072 WORDS x 8 BIT CMOS STATIC RAM Pin Configuration Description The G M 76C 8128A/AL/ALL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits. U sing a 0.8um advanced CMOS technology, it provides high speed operation with


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    GM76C8128A/AL/ALL 128A/AL/ALL 70/85/100ns. GM76C8128A/AL/ALL 32-pin GM76C8128all GM76C8128A GM76C8128 PDF

    GM76C256B

    Contextual Info: LG Semicon Co.,Ltd. GM76C256BL/BLL-W 32,768 WORDS x 8 BIT CMOS STATIC RAM Pin Configuration Description The GM76C256BL/BLL-W is a 262,144 bits static random access memory organized as 32,768 words by 8 bits. Using a 0.8um advanced CMOS technology and operated from a single 2 7V to 5.5V supply.


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    GM76C256BL/BLL-W 28-pin 600mil) 480mil) GM76C256BL/BLL-W GM76C256B PDF

    GM76C8128all

    Abstract: 76C8128 GoldStar gm76c8128 367 al al85 76C812 al 85
    Contextual Info: Ö6Z bZL GM76C8128A/AL/ALL GZ! GoldStar 131,072 W ORDS x 8 BIT CMOS STATIC RAM GOLDSTAR ELECTRON CO., LTD. Pin Configuration Description The GM76C8128A/AL/ALL is a 1,084,576 bits stat­ ic random access m em ory organized as 131,072 w ords by 8 bits. U sing a 0.8um advanced CMOS


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    GM76C8128A/AL/ALL GM76C8128A/AL/ALL 70/85/100ns. 32-pin 600mil) 70/8uuULJUUUU Gi\176C8128A/AL/ALL GM76C8128all 76C8128 GoldStar gm76c8128 367 al al85 76C812 al 85 PDF

    76C8128

    Abstract: gm76c8128a GM76C8128all
    Contextual Info: GM76C8128L/LL LG Semicon Co.,Ltd. 131,072 w o r d s x 8 b i t CMOS STATIC RAM Pin Configuration Description The G M 76C 8128L/LL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits. Using a 0.8um advanced CMOS technology, it provides high speed operation with


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    GM76C8128L/LL 70/85/100ns. 8128L/LL 32-pin 600mil) 525mil) GM76C8128L/LL 047fl 76C8128 gm76c8128a GM76C8128all PDF

    Contextual Info:       Gate Array CMOS Library 0.8um, 5V CMOS Technology                                   !"   "    


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    1.2 Micron CMOS Process Family

    Abstract: 0.8 Micron CMOS Process Family CMOS Process Family 08um
    Contextual Info: 0.8 Micron CMOS Process Family  October 1995 Features • • • • • Process Parameters Double Poly/Double Metal 1.7µm Poly and 2.1µm Metal I Pitch 5.5 Volts Maximum Operating Voltage Twin-tub process ProToDuction Option for prototype Description


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    TEMIC ecl

    Abstract: microcontroller radiation tolerance microcontroller radiation hard CLCC 84 CMOS NAND2
    Contextual Info: Temic Full Custom: MF Semiconductors 0.8-fxm BiCMOS Gate Array Description MF is a high speed gate array combining 10-GHz n-p-n and integration close to that of CMOS LSIs, keeping low bipolar transistors, with CMOS 0.8-nm, two metal layer power competitiveness.


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    10-GHz 10-May-96 TEMIC ecl microcontroller radiation tolerance microcontroller radiation hard CLCC 84 CMOS NAND2 PDF

    JORDAN

    Abstract: UT8Q512 SRAM flatpack SRAM TTL UT7Q512 UT9Q512 UTXQ512
    Contextual Info: UTXQ512 SRAM Product Overview Anthony Jordan Standard Product Line Manager UTMC Microelectronic Systems 719-594-8252, jordan@utmc.aeroflex.com www.utmc.com Updated January 2000 UTXQ512 SRAM • 4Mbit density – Organized 512K x 8 – 100ns X=7 and 25ns (X=8 or X=9) access time, asynchronous


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    UTXQ512 100ns 100ns, 100ns 128MeV-cm2/mg Co-60 JORDAN UT8Q512 SRAM flatpack SRAM TTL UT7Q512 UT9Q512 PDF