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40
CO NNECTIO N DIAGRAMS PINOUT A
54/7440 0 '° / l^ H / 7 4 H 4 0 o n o ^ 'v ^ 4 S / 7 4 S4 0 o / f c L/'l ^54LS/74LS40 C'Oi
DUAL 4-INPUT NAND BUFFER
ORDERING CODE: See Section 9 PIN PKGS Plas
