DSAQ00408103.pdf by Cypress Semiconductor

Partial File Text CY7C1318CV18, CY7C1320CV18 18-Mbit DDR II SRAM 2-Word Burst Architecture 18-Mbit DDR II SRAM 2-Word Burst Architecture Features I I I I Configurations CY7C1318CV18 1M × 18 CY7C1320CV18
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Pb Free Unknown
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