DSAUTAZ00802.pdf by Altera

Partial File Text Conference Paper Practical Reed Solomon Design for PLD Architectures The paper discusses a fully synthesizable VHDL megafunction implementing a Reed-Solomon forward error-correcting coder/decoder
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"Galois Field Multiplier" verilog dds vhdl Reed-Solomon CODEC system generator REED SOLOMON vhdl convolution coding viterbi convolution

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