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DSAEDA000132585.pdf
by Cypress Semiconductor
Partial File Text
CY7C1562XV18, CY7C1564XV18 72-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) 72-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
Datasheet Type
Original
RoHS
Unknown
Pb Free
Unknown
Lifecycle
Unknown
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